Patents by Inventor Raymond Kuang

Raymond Kuang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070228548
    Abstract: A carrier for a semiconductor die has a substrate with a cavity formed in the substrate. The cavity has a bottom and sidewalls, and the sidewalls have a stepped tier. Electrically conductive contacts are disposed on an underside of the substrate. Electrically conductive tabs are disposed on the stepped tier, and electrically conductive external bond terminals are disposed on an edge of the substrate. Electrically conductive paths are formed in the substrate and electrically coupled between the electrically conductive tabs, the electrically conductive contacts, and the electrically conductive external bond terminals.
    Type: Application
    Filed: June 12, 2007
    Publication date: October 4, 2007
    Applicant: ACTEL CORPORATION
    Inventor: Raymond Kuang
  • Patent number: 7244633
    Abstract: A carrier for a semiconductor die has a substrate with a cavity formed in the substrate. The cavity has a bottom and sidewalls, and the sidewalls have a stepped tier. Electrically conductive contacts are disposed on an underside of the substrate. Electrically conductive tabs are disposed on the stepped tier, and electrically conductive external bond terminals are disposed on an edge of the substrate. Electrically conductive paths are formed in the substrate and electrically coupled between the electrically conductive tabs, the electrically conductive contacts, and the electrically conductive external bond terminals.
    Type: Grant
    Filed: May 13, 2005
    Date of Patent: July 17, 2007
    Assignee: Actel Corporation
    Inventor: Raymond Kuang
  • Patent number: 7148505
    Abstract: A carrier for a semiconductor die has a substrate with a cavity formed in the substrate. The cavity has a bottom and sidewalls, and the sidewalls have a stepped tier. Electrically conductive contacts are disposed on an underside of the substrate. Electrically conductive tabs are disposed on the stepped tier, and electrically conductive external bond terminals are disposed on an edge of the substrate. Electrically conductive paths are formed in the substrate and electrically coupled between the electrically conductive tabs, the electrically conductive contacts, and the electrically conductive external bond terminals.
    Type: Grant
    Filed: May 13, 2005
    Date of Patent: December 12, 2006
    Assignee: Actel Corporation
    Inventor: Raymond Kuang
  • Patent number: 6946726
    Abstract: A carrier for a semiconductor die has a substrate with a cavity formed in the substrate. The cavity has a bottom and sidewalls, and the sidewalls have a stepped tier. Electrically conductive contacts are disposed on an underside of the substrate. Electrically conductive tabs are disposed on the stepped tier, and electrically conductive external bond terminals are disposed on an edge of the substrate. Electrically conductive paths are formed in the substrate and electrically coupled between the electrically conductive tabs, the electrically conductive contacts, and the electrically conductive external bond terminals.
    Type: Grant
    Filed: November 26, 2003
    Date of Patent: September 20, 2005
    Assignee: Actel Corporation
    Inventor: Raymond Kuang
  • Patent number: 6853055
    Abstract: A semiconductor die carrier includes a radiation shielding base having a radiation shielding integrated base flange extending orthogonally from an upper surface of the base, the integrated base flange having an upper surface. A substrate is disposed on the radiation shielding base and around the integrated base flange, the substrate has an uppermost tier with an upper surface that is not higher than the upper surface of said integrated base flange. A radiation shielding seal lid has a radiation shielding integrated seal lid flange, the radiation shielding integrated seal lid flange has a lower surface disposed on the upper surface of the uppermost tier of the substrate.
    Type: Grant
    Filed: November 26, 2003
    Date of Patent: February 8, 2005
    Assignee: Actel Corporation
    Inventor: Raymond Kuang