Patents by Inventor Raymond L. Parsons

Raymond L. Parsons has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4891811
    Abstract: A memory may contain a large number of bytes of data perhaps as many as 256 megabytes in a typical large memory structure. An error correcting code algorithm may be used to identify failing memory modules in a memory system. In a particular embodiment, a number of spares may be provided on each memory card allowing a predetermined number of defective array modules to be replaced in a storage work. With double bit correction provided by the error correcting code logic, a number of bits can be corrected on a card or a larger number of bits can be corrected on a card pair, where the larger number of bits is somewhat less than double the number of bits which can be corrected on a single card. The address test in accordance with the present invention then produces a pattern that will create a difference greater than that larger number of bits between the data stored in a storage location under test and any address that could be accesseed by an address line failure.
    Type: Grant
    Filed: February 13, 1987
    Date of Patent: January 2, 1990
    Assignee: International Business Machines Corporation
    Inventors: Kevin J. Ash, Jack H. Derenburger, Raymond L. Parsons
  • Patent number: 4393459
    Abstract: Resources shared by plural users supply a busy signal to a requesting user whenever any one of the users has a right of access to the resources. Ancillary data accompanies the busy signal identifying the user having the right of access. The requesting user may use the ancillary data to adjust its right of access by communication with the one user. The right of access may include a queue of access requests, each request having the ancillary data.
    Type: Grant
    Filed: July 17, 1980
    Date of Patent: July 12, 1983
    Assignee: International Business Machines Corp.
    Inventors: John D. Huntley, Raymond L. Parsons
  • Patent number: 4321687
    Abstract: Clock pulse plural cascade connected counters generate a plurality of patterns. Upon each clock pulse, the patterns in the plurality of counters are captured in a like plurality of registers. Each of the captured counts are then compared with one or more bit masks for determining identity. Detection of identity between any one of the plurality of masks with the selected ones of the registers results in the emission of a timing pulse. The initial counter states and the various mask values in the mask sets for the respective registers are program loaded. The apparatus can be computer monitored or can be programmed within a digital computer. Accordingly, the timing intervals are programmable by selecting diverse time-out lists.
    Type: Grant
    Filed: October 1, 1979
    Date of Patent: March 23, 1982
    Assignee: International Business Machines Corporation
    Inventors: Raymond L. Parsons, Paul H. Paulsen