Patents by Inventor Raymond L. Veith
Raymond L. Veith has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8872569Abstract: An automatic quadrature network with amplitude and phase detection produces quadrature signals for an input oscillator signal, the quadrature signals being equal in amplitude and having ideal quadrature phase between them. An RC circuit provides one quadrature path, and a CR circuit provides another quadrature path. The outputs from the RC/CR circuits are amplitude detected to produce an amplitude control signal. The outputs also are amplitude limited, and the phase between the limiter outputs is detected to produce a phase control signal. The amplitude and phase control signals are combined to generate respective control signals for the RC/CR circuits to automatically align them so that the quadrature signals are of equal amplitude and ideal quadrature phase.Type: GrantFiled: November 19, 2012Date of Patent: October 28, 2014Assignee: Tektronix, Inc.Inventors: Kelly F. Garrison, Raymond L. Veith, Gordon A. Olsen, Jeffrey D. Earls
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Publication number: 20140139279Abstract: An automatic quadrature network with amplitude and phase detection produces quadrature signals for an input oscillator signal, the quadrature signals being equal in amplitude and having ideal quadrature phase between them. An RC circuit provides one quadrature path, and a CR circuit provides another quadrature path. The outputs from the RC/CR circuits are amplitude detected to produce an amplitude control signal. The outputs also are amplitude limited, and the phase between the limiter outputs is detected to produce a phase control signal. The amplitude and phase control signals are combined to generate respective control signals for the RC/CR circuits to automatically align them so that the quadrature signals are of equal amplitude and ideal quadrature phase.Type: ApplicationFiled: November 19, 2012Publication date: May 22, 2014Applicant: TEKTRONIX, INCInventors: Kelly F. GARRISON, Raymond L. VEITH, Gordon A. OLSEN, Jeffrey D. EARLS
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Patent number: 7941686Abstract: A signal generator can control phase relationship between output signals of the channels without stopping clocks provided to the channels to enable the circuit operation fast. First and second channels 20 and 22 have signal generation blocks 10 and 12 that have clock phase shift circuits 26 and 28, memories, parallel to serial converters and DACs respectively. A phase comparator 24 compares data reading clocks from the signal generation blocks 10 and 12 to produce a phase difference signal wherein the data reading clocks are used to read waveform data from the memories within the signal generation blocks 10 and 12. A CPU controls the clock phase shift circuits 26 and 28 according to the phase difference signal to shift phases of the clocks provided to the signal generation blocks 10 and 12 and then makes phase relationship between the output signals of the first and second channels 20 and 22 as desired.Type: GrantFiled: May 26, 2009Date of Patent: May 10, 2011Assignee: Tektronix International Sales GmbHInventors: Yasumasa Fujisawa, Raymond L. Veith
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Publication number: 20090231005Abstract: A signal generator can control phase relationship between output signals of the channels without stopping clocks provided to the channels to enable the circuit operation fast. First and second channels 20 and 22 have signal generation blocks 10 and 12 that have clock phase shift circuits 26 and 28, memories, parallel to serial converters and DACs respectively. A phase comparator 24 compares data reading clocks from the signal generation blocks 10 and 12 to produce a phase difference signal wherein the data reading clocks are used to read waveform data from the memories within the signal generation blocks 10 and 12. A CPU controls the clock phase shift circuits 26 and 28 according to the phase difference signal to shift phases of the clocks provided to the signal generation blocks 10 and 12 and then makes phase relationship between the output signals of the first and second channels 20 and 22 as desired.Type: ApplicationFiled: May 26, 2009Publication date: September 17, 2009Applicant: Tektronix International Sales GmbHInventors: Yasumasa Fujisawa, Raymond L. Veith
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Patent number: 7562246Abstract: A signal generator can control phase relationship between output signals of the channels without stopping clocks provided to the channels to enable the circuit operation fast. First and second channels 20 and 22 have signal generation blocks 10 and 12 that have clock phase shift circuits 26 and 28, memories, parallel to serial converters and DACs respectively. A phase comparator 24 compares data reading clocks from the signal generation blocks 10 and 12 to produce a phase difference signal wherein the data reading clocks are used to read waveform data from the memories within the signal generation blocks 10 and 12. A CPU controls the clock phase shift circuits 26 and 28 according to the phase difference signal to shift phases of the clocks provided to the signal generation blocks 10 and 12 and then makes phase relationship between the output signals of the first and second channels 20 and 22 as desired.Type: GrantFiled: August 24, 2006Date of Patent: July 14, 2009Assignee: Tektronix International Sales GmbHInventors: Yasumasa Fujisawa, Raymond L. Veith
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Patent number: 7284025Abstract: A DDS pulse generator has an accumulator that accumulates a phase increment value to produce phase accumulator values, and has a lookup table that contains a digital representation of a pulse waveform such that a pulse output signal is produced from the lookup table in response to the phase accumulator values. To change a period of the pulse output signal without changing edge positions a programmable modulo value is used. An address mapper is situated between the accumulator and address lines of the lookup table to map the rising and falling edge portions of the phase accumulator values into large regions of the lookup table, while phase accumulator values corresponding to high and low logic levels are mapped into small regions of the lookup table. The resulting pulse output signal has easily independently controlled period and pulse width as well as rising and falling edge speeds.Type: GrantFiled: December 18, 2003Date of Patent: October 16, 2007Assignee: Tektronix, Inc.Inventors: Steven K. Sullivan, Raymond L. Veith, Iwao Akiyama, Yasumasa Fujisawa
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Patent number: 7281025Abstract: A triggered DDS generator architecture accumulates a phase increment value in response to a DDS clock to generate phase accumulator values for addressing a waveform lookup table which contains a desired output signal. A time measurement circuit determines a time interval between the arrival of a trigger signal and a subsequent cycle of the DDS clock, which time interval is used to either adjust an initial phase accumulator value or delay the DDS clock so that a constant time is maintained between the arrival of the trigger signal and the desired output signal.Type: GrantFiled: December 18, 2003Date of Patent: October 9, 2007Assignee: Tektronix, Inc.Inventors: Steven K. Sullivan, Raymond L. Veith, Iwao Akiyama, Yasumasa Fujisawa, Yukio Aizawa
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Phase startable clock device for a digitizing instrument having deterministic phase error correction
Patent number: 6411244Abstract: A phase stable clock circuit includes a phase gate having track-and-hold (T/H) circuits with each T/H circuit receiving a phase shifted continuous sinusoidal signal of predetermined phase and a control input signal to capture and hold phase samples of the sinusoidal signals. In alternative embodiments, a phase correction circuit provides phase correction values that are added to the held phase values to generate corrected phase values and time-error phase lookup table is used to generate time position correction values. The corrected phase values are applied to the phase gate remove deterministic phase errors to generate an output signal with a predetermined startup phase relative to the control input signal transition. The phase error-to-time lookup table adjusts the time placement of waveform record samples after the acquisition of the samples.Type: GrantFiled: March 5, 2001Date of Patent: June 25, 2002Assignee: Tektronix, Inc.Inventors: Laszlo Dobos, Raymond L. Veith