Patents by Inventor Raymond Pelletier

Raymond Pelletier has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040040306
    Abstract: A multiple conduit system for a gas turbine engine, the multiple conduit system extending between a plurality of conduit inlet and outlets. A channel is formed in a surface of a gas turbine engine component, and the channel is adapted for conveying a fluid flow from an inlet to an outlet. At least a first sealing member is disposed within the channel and divides the channel into at least a first discrete conduit and a second discrete conduit. A second sealing member encloses the channel to define the second discrete conduit. The first and second discrete conduits are each adapted to direct an independent fluid flow from respective inlets to respective outlets.
    Type: Application
    Filed: August 30, 2002
    Publication date: March 4, 2004
    Inventors: Lev Alexander Prociw, Harris Shafique, John Sokalski, Claude Raymond Pelletier
  • Patent number: 6664883
    Abstract: A method and apparatus to layout planar magnetic coils on a PCB consists of maximizing the layer to layer overlap, and consequently maximizing total inductance for the given layout area, by spiraling alternating layers inward and outward. A further benefit of the matching opposite spirals is the ability to make the layer to layer electrical contacts within the magnetic field area, thus reducing leakage inductance, and minimizing the wasted extra conductor line length needed to make the connections outside the magnetic field. The reduced conductor line length results in reduced conductor line resistance. The method is applicable to voltage transformers and isolation transformers as well as simple inductors and other magnetic devices. In the transformer case the odd numbered layers are typically connected together in series to provide a larger turn ratio, and the even numbered layers are typically single turns (i.e., no spiral) connected together in parallel to provide more current capability.
    Type: Grant
    Filed: June 11, 2002
    Date of Patent: December 16, 2003
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Raoji A. Patel, James E. Drew, Raymond A. Pelletier, Brian R. McQuain
  • Patent number: 6600668
    Abstract: A crowbar circuit comprises an over-voltage detector that monitors the output voltage of a synchronous DC/DC converter. When the output voltage rises above a predetermined threshold, the detector applies a control signal to a MOSFET switch that is already in use as part of a rectifier in the converter. The control signal overrides a periodic switching signal applied to the gate of the MOSFET, causing it to conduct continuously and thereby apply a shunt path for the output current of the rectifier. The control signal may be continuously applied until the converter is manually reset. Because the voltage across the conducting MOSFET is small and it can be turned on quickly, the MOSFET rapidly clamps the DC/DC converter's output to a voltage low enough to avoid damage to integrated circuitry powered by the converter.
    Type: Grant
    Filed: May 21, 2002
    Date of Patent: July 29, 2003
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Raoji A. Patel, Raymond A. Pelletier
  • Publication number: 20020149461
    Abstract: A method and apparatus to layout planar magnetic coils on a PCB consists of maximizing the layer to layer overlap, and consequently maximizing total inductance for the given layout area, by spiraling alternating layers inward and outward. A further benefit of the matching opposite spirals is the ability to make the layer to layer electrical contacts within the magnetic field area, thus reducing leakage inductance, and minimizing the wasted extra conductor line length needed to make the connections outside the magnetic field. The reduced conductor line length results in reduced conductor line resistance. The method is applicable to voltage transformers and isolation transformers as well as simple inductors and other magnetic devices. In the transformer case the odd numbered layers are typically connected together in series to provide a larger turn ratio, and the even numbered layers are typically single turns (i.e., no spiral) connected together in parallel to provide more current capability.
    Type: Application
    Filed: June 11, 2002
    Publication date: October 17, 2002
    Applicant: Compaq Computer Corporation
    Inventors: Raoji A. Patel, James E. Drew, Raymond A. Pelletier, Brian R. McQuain
  • Patent number: 6429763
    Abstract: A method and apparatus to layout planar magnetic coils on a PCB consists of maximizing the layer to layer overlap, and consequently maximizing total inductance for the given layout area, by spiraling alternating layers inward and outward. A further benefit of the matching opposite spirals is the ability to make the layer to layer electrical contacts within the magnetic field area, thus reducing leakage inductance, and minimizing the wasted extra conductor line length needed to make the connections outside the magnetic field. The reduced conductor line length results in reduced conductor line resistance. The method is applicable to voltage transformers and isolation transformers as well as simple inductors and other magnetic devices. In the transformer case the odd numbered layers are typically connected together in series to provide a larger turn ratio, and the even numbered layers are typically single turns (i.e., no spiral) connected together in parallel to provide more current capability.
    Type: Grant
    Filed: February 1, 2000
    Date of Patent: August 6, 2002
    Assignee: Compaq Information Technologies Group, L.P.
    Inventors: Raoji A. Patel, James E. Drew, Raymond A. Pelletier, Brian R. McQuain
  • Publication number: 20020057171
    Abstract: A method and apparatus to layout planar magnetic coils on a PCB consists of maximizing the layer to layer overlap, and consequently maximizing total inductance for the given layout area, by spiraling alternating layers inward and outward. A further benefit of the matching opposite spirals is the ability to make the layer to layer electrical contacts within the magnetic field area, thus reducing leakage inductance, and minimizing the wasted extra conductor line length needed to make the connections outside the magnetic field. The reduced conductor line length results in reduced conductor line resistance. The method is applicable to voltage transformers and isolation transformers as well as simple inductors and other magnetic devices. In the transformer case the odd numbered layers are typically connected together in series to provide a larger turn ratio, and the even numbered layers are typically single turns (i.e., no spiral) connected together in parallel to provide more current capability.
    Type: Application
    Filed: February 1, 2000
    Publication date: May 16, 2002
    Inventors: Raoji A. Patel, James E. Drew, Raymond A. Pelletier, Brian R. McQuain
  • Patent number: 6373732
    Abstract: A method of preventing current hogging in parallel connected transformers, and an apparatus for efficiently implementing the method are presented. Current hogging occurs when synchronous power converter transformers operate in a low output current mode. Low output current demands are typically meet by adjusting the duty cycle of the transformer to a low level. This results in the catch FET maintaining a low resistance path to ground for long time periods and allows a stronger one of the parallel power converter transformers to sink current to ground through a weaker transformer. The method consists of using a current sensor to detect low or negative output currents, and then driving the transistor providing the path to ground to an off state.
    Type: Grant
    Filed: February 1, 2000
    Date of Patent: April 16, 2002
    Assignee: Compaq Information Technologies Group, L.P.
    Inventors: Raoji A. Patel, Raymond A. Pelletier, Robert J. Wolf