Patents by Inventor Raymundo J. Medina

Raymundo J. Medina has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10181858
    Abstract: Sampling accuracy during sampling of analog input signals may be improved by performing an “auto-zero every sample” procedure. The ratio of input signal samples to zero input samples for the sampling time interval defined by the sampling frequency may be determined based on the sampling frequency. For sampling frequencies equal to or less than a specified frequency characteristic of the signal conditioning path of the analog input signal, the ratio may be set to unity (one). For sampling frequencies above the specified frequency, the ratio may be set to be greater than unity (one), and may be a power-of-two. A digital signal processing block may include independent digital signal processing paths for the input signal measurements and the zero input measurements. Each signal processing path may include a low-pass infinite impulse response filter, an average decimation finite impulse response filter, and a binary shifter to allow for the adjustable ratio.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: January 15, 2019
    Assignee: NATIONAL INSTRUMENTS CORPORATION
    Inventor: Raymundo J. Medina
  • Patent number: 10069400
    Abstract: A residual current (e.g. common-mode current) may be present in an isolated subsystem. The isolated subsystem may include the secondary winding of a transformer while a first subsystem may include the primary winding of the transformer. The first subsystem may also include a compensation circuit. A driver circuit may generate drive signals provided to the primary winding of the transformer and also to the compensation circuit. The compensation circuit may include a variable capacitor network (e.g. a variable capacitor diode network) that receives the drive signals and also receives a bias voltage, and generates a cancellation signal according to the drive signals and the bias voltage. The compensation circuit may provide the cancellation signal to the ground plane of the isolated subsystem through a capacitor that couples the variable capacitor diode network to the ground plane, in order to reduce or cancel the residual current present in the isolation subsystem.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: September 4, 2018
    Assignee: NATIONAL INSTRUMENTS CORPORATION
    Inventors: Larry D. Morgan, Jr., Raymundo J. Medina