Patents by Inventor Razi Abdul Rahim

Razi Abdul Rahim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230421477
    Abstract: A method for generating a simulation timeline encoded packets view is disclosed. In some embodiments, the method includes receiving a type string from each of a plurality of simulation testbench components. The method further includes assigning a unique type code to each of the plurality of simulation testbench components based on the type string. The method further includes iteratively receiving from at least one of the plurality of simulation testbench components, a plurality of data strings along with the corresponding assigned unique type code. The method further includes storing each of the plurality of data strings marked with an associated receipt timestamp. The method further includes contemporaneously generating at each iteration, a simulation timeline encoded packets view for each of the plurality of simulation testbench components. The method further includes contemporaneously rendering at each iteration the simulation timeline encoded packets view via a Graphical User Interface (GUI).
    Type: Application
    Filed: June 28, 2022
    Publication date: December 28, 2023
    Inventors: MANICKAM MUTHIAH, NISHA RAVICHANDRAN, RAZI ABDUL RAHIM, Gunamani Rajagopal
  • Publication number: 20230419007
    Abstract: This disclosure relates to system and method for generating an encapsulated error signature during functional simulation. The method includes receiving at least one error descriptor notification message from at least one of a plurality of testbench components. Each of the at least one error descriptor notification message includes values corresponding to a plurality of error attributes including error ranking, error code, error message, and error score. The method further includes iteratively updating in real-time, a plurality of arrays based on values corresponding to one or more of the plurality of error attributes, in response to receiving each of the at least one error descriptor notification message. The method further includes iteratively generating in real-time, an encapsulated error signature based on each of the error ranking, the error code, and an error count associated with the error code derived from one or more of the plurality of arrays.
    Type: Application
    Filed: June 28, 2022
    Publication date: December 28, 2023
    Inventors: MANICKAM MUTHIAH, Razi Abdul Rahim
  • Publication number: 20230418728
    Abstract: A method for generating a real-time test environment activity view for a functional simulation is disclosed. In some embodiments, the method includes retrieving a unique identifier (ID) associated with each of a plurality of testbench components present in a test environment from a real-time test environment activity viewer log file. The method further includes iteratively fetching from the real-time test environment activity viewer log file, a set of information corresponding to an activity associated with each of the plurality of testbench components based on the associated unique ID. The method further includes contemporaneously generating at each iteration, a real-time test environment activity view for each of the plurality of testbench components based on the associated set of information. The method further includes contemporaneously rendering at each iteration, the real-time test environment activity view for each of the plurality of testbench components via a Graphical User Interface (GUI).
    Type: Application
    Filed: June 24, 2022
    Publication date: December 28, 2023
    Inventors: MANICKAM MUTHIAH, SELVIN ISAAC PANDIAN, RAZI ABDUL RAHIM
  • Patent number: 11797409
    Abstract: A method for managing transactions burstiness associated with a sequence of transactions generated in a test environment for verifying a Device Under Test (DUT) is disclosed. In some embodiments, the method includes processing a plurality of signals associated with a sequence of transactions. The method further includes generating a transactions burstiness signature representative of the sequence of transactions based on processing a set of signals from the plurality of signals. The method further includes analysing the transactions burstiness signature to identify at least one pattern of interest. The method further includes iteratively providing an input comprising at least one missing pattern of interest. The method further includes iteratively generating a subsequent sequence of transactions and a subsequent transactions burstiness signature associated with the subsequent sequence of transactions.
    Type: Grant
    Filed: September 2, 2022
    Date of Patent: October 24, 2023
    Inventors: Manickam Muthiah, Razi Abdul Rahim
  • Publication number: 20230315936
    Abstract: This disclosure relates to method and system for representing functional simulation performance for a plurality of simulations in real-time using Graphical User Interface (GUI) elements. For each of the plurality of simulations in a verification environment and upon completing each of a plurality of simulation intervals, the method includes determining a simulation performance value for a simulation interval based on wall clock time lapsed during completion of the simulation interval; calculating, in real-time, an average simulation performance value based on a sum of the simulation performance value corresponding to each of completed simulation intervals from the plurality of simulation intervals; estimating an additional wall clock time required to complete remaining of the plurality of simulation intervals using the average simulation performance value; and updating a special log file with a set of simulation parameters.
    Type: Application
    Filed: April 4, 2022
    Publication date: October 5, 2023
    Inventors: MANICKAM MUTHIAH, SATHISH KUMAR KRISHNAMOORTHY, Razi Abdul Rahim
  • Publication number: 20230269163
    Abstract: A method for identifying locked-up simulation testbench components during a simulation is disclosed. In some embodiments, the method includes creating, by an initiator simulation testbench component, at least one migrant packet. The method further includes circulating, during a component identification cycle, each of the at least one migrant packet in an associated predefined direction through each of the plurality of simulation testbench components in the associated daisy loop from the at least one daisy loop. The method further includes circulating, during an issue identification cycle, each of the least one migrant packet in the associated predefined direction through each of the plurality of simulation testbench components in the associated daisy loop.
    Type: Application
    Filed: February 18, 2022
    Publication date: August 24, 2023
    Inventors: Manickam Muthiah, Rohit Kumar, Shashank Nafde, Razi Abdul Rahim
  • Patent number: 11683258
    Abstract: A method for off-loading streams selection to generate organized concurrent streams in a simulation environment is disclosed. In some embodiments, the method includes receiving at least one stream selection request for a DUT from a DUT input generator; performing a stream selection process in response to receiving the request. In order to perform the stream selection process, the method includes analyzing each of a plurality of stream specification entries of a stream specification entries array; selecting a stream from the plurality of streams based on one or more of the set of stream specification entry fields associated with the stream; and generating a stream selection result object based on the selected stream; sending the stream selection result object associated with the selected stream to a respective DUT input generator; and utilizing, by the respective DUT input generator, the stream selection result object associated with the selected stream.
    Type: Grant
    Filed: May 19, 2022
    Date of Patent: June 20, 2023
    Assignee: HCL America Inc.
    Inventors: Manickam Muthiah, Rohit Kumar, Shashank Nafde, Razi Abdul Rahim