Abstract: Operating current sense circuits. At least some of the example embodiments are methods including: sensing a current flow through a sense resistor by way of an operational amplifier defining a non-inverting input coupled to a first side of the sense resistor and an inverting input coupled to a second side of the sense resistor; driving a signal to a sense output of the operational amplifier, the signal proportional to the current flow through the sense resistor; and then disabling the current sense circuit comprising: de-coupling a first feedback path of the operational amplifier, the first feedback path coupled to the non-inverting input; and de-coupling a second feedback path of the operational amplifier, the second feedback path coupled to the inverting input. The methods also include disabling the current sense circuit by disabling an input stage of the operational amplifier.

Abstract: Operating current sense circuits. At least some of the example embodiments are methods including: sensing a current flow through a sense resistor by way of an operational amplifier defining a non-inverting input coupled to a first side of the sense resistor and an inverting input coupled to a second side of the sense resistor; driving a signal to a sense output of the operational amplifier, the signal proportional to the current flow through the sense resistor; and then disabling the current sense circuit comprising: de-coupling a first feedback path of the operational amplifier, the first feedback path coupled to the non-inverting input; and de-coupling a second feedback path of the operational amplifier, the second feedback path coupled to the inverting input. The methods also include disabling the current sense circuit by disabling an input stage of the operational amplifier.

Abstract: A chopper-stabilized amplifier that includes an analog driven level shifter is disclosed. The analog driven level shifter changes the levels of a pair of complementary clock signals according to a level associated with an input signal to the chopper-stabilized amplifier. The level shifted complementary clock signals are used to control switching devices used for chopping input signals of various voltages. The chopper-stabilized amplifier also includes symmetrical passive RC notch filters having two cut-off frequencies to reduce ripple noise from the chopping.

Abstract: A chopper-stabilized amplifier that includes an analog driven level shifter is disclosed. The analog driven level shifter changes the levels of a pair of complementary clock signals according to a level associated with an input signal to the chopper-stabilized amplifier. The level shifted complementary clock signals are used to control switching devices used for chopping input signals of various voltages. The chopper-stabilized amplifier also includes symmetrical passive RC notch filters having two cut-off frequencies to reduce ripple noise from the chopping.

Abstract: In a general aspect, a current sense amplifier circuit (CSA) can include a null amplifier path and a main amplifier path that are both configured to receive a differential input voltage. The null amplifier path can output a first differential output voltage based on the differential input voltage. The main amplifier path can also be configured to receive the first differential output voltage and output a second differential output voltage based on the differential input voltage and the first differential output voltage. The null and main amplifier paths can each include a differential amplifier having first and second input stages that are each configured to receive the differential input voltage. The first input stage and the second input stage of the main amplifier path can and be powered by a respective (first and second) floating voltage supply rails that are referenced to a floating ground rail.

Abstract: In a general aspect, a current sense amplifier circuit (CSA) can include a null amplifier path and a main amplifier path that are both configured to receive a differential input voltage. The null amplifier path can output a first differential output voltage based on the differential input voltage. The main amplifier path can also be configured to receive the first differential output voltage and output a second differential output voltage based on the differential input voltage and the first differential output voltage. The null and main amplifier paths can each include a differential amplifier having first and second input stages that are each configured to receive the differential input voltage. The first input stage and the second input stage of the main amplifier path can and be powered by a respective (first and second) floating voltage supply rails that are referenced to a floating ground rail.

Abstract: According to one embodiment, an apparatus is for use with a remote circuit. The apparatus has a first input for receiving an input voltage, a second input for receiving a power supply voltage, and a third input for receiving an input clock having a high state corresponding to the power supply voltage and a low state corresponding to a return for the power supply voltage. The apparatus includes a first shift circuit coupled to the first input and the third input, and configured to output a first output clock, the first output clock having a low state corresponding to the input voltage. The apparatus further includes a second shift circuit coupled to the first input and the first shift circuit, and configured to output a second output clock, the second output clock having a high state corresponding to the input voltage.

Abstract: A method for adjusting common mode rejection ratio (CMRR) and gain error of a current sense (CS) amplifier, comprising: measuring a first referred to input (RTI) offset voltage while presenting a given common mode (CM) input voltage; adding a first trim resistor of a plurality of selectable trim resistors within an adjustable feedback resistor chain to a feedback electrical path; measuring a second RTI offset voltage while presenting the given CM input voltage; estimating, based upon the first and second RTI offset voltages, a third RTI offset voltage value that would result by adding a second trim resistor of the plurality of selectable trim resistors to the feedback electrical path; using the first, second and third RTI offset voltage values to identify the combination of selectable trim resistors that achieves an RTI offset voltage closest to zero volts; and adding the identified selectable trim resistors to the feedback electrical path.

Abstract: Current sense amplifiers with extended input common mode (CM) voltage range, including an extended CM input voltage amplifier that includes a low voltage (LV) p-type metal oxide semiconductor (PMOS) input module coupled to a positive supply rail, wherein said supply rail provides a voltage that is the maximum between a positive input signal (IN+) applied to the amplifier and an internal power supply voltage. The amplifier further includes a voltage regulator coupled to the supply rail that generates a decreased voltage level relative to the supply rail voltage that is provided to the LV PMOS input module via a high voltage ground (HV_GND) line. At least part of the LV PMOS input module is powered by a voltage difference between the positive supply rail and the HV_GND line. The voltage regulator maintains said voltage difference within an operating range of LV devices within the LV PMOS input module.

Abstract: A method for adjusting common mode rejection ratio (CMRR) and gain error of a current sense (CS) amplifier, comprising: measuring a first referred to input (RTI) offset voltage while presenting a given common mode (CM) input voltage; adding a first trim resistor of a plurality of selectable trim resistors within an adjustable feedback resistor chain to a feedback electrical path; measuring a second RTI offset voltage while presenting the given CM input voltage; estimating, based upon the first and second RTI offset voltages, a third RTI offset voltage value that would result by adding a second trim resistor of the plurality of selectable trim resistors to the feedback electrical path; using the first, second and third RTI offset voltage values to identify the combination of selectable trim resistors that achieves an RTI offset voltage closest to zero volts; and adding the identified selectable trim resistors to the feedback electrical path.

Abstract: Current sense amplifiers with extended input common mode (CM) voltage range, including an extended CM input voltage amplifier that includes a low voltage (LV) p-type metal oxide semiconductor (PMOS) input module coupled to a positive supply rail, wherein said supply rail provides a voltage that is the maximum between a positive input signal (IN+) applied to the amplifier and an internal power supply voltage. The amplifier further includes a voltage regulator coupled to the supply rail that generates a decreased voltage level relative to the supply rail voltage that is provided to the LV PMOS input module via a high voltage ground (HV_GND) line. At least part of the LV PMOS input module is powered by a voltage difference between the positive supply rail and the HV_GND line. The voltage regulator maintains said voltage difference within an operating range of LV devices within the LV PMOS input module.