Abstract: A method, mold and apparatus for encapsulating and underfilling an integrated circuit chip assembly. The mold has a first portion and a second portion with the first portion having first and second cavities and at least one channel interconnecting the first and second cavities. The first cavity is adapted to enclose the integrated circuit chip on the substrate. A clamping force is applied to the first and second portions of the mold to clamp the substrate between them with the integrated circuit chip located in the first cavity. Vents exhaust air from the first cavity. Encapsulant is injected into the first cavity of the first portion at a location in the first portion remote from the point of connection of the channel such that encapsulant flows around and underneath the integrated circuit chip and through the channel into the second cavity to thereby underfill and encapsulate the integrated circuit assembly.

Abstract: A method, mold and apparatus for encapsulating and underfilling an integrated circuit chip assembly. The mold has a first portion and a second portion with the first portion having first and second cavities and at least one channel interconnecting said first and second cavities. The first cavity is adapted to enclose said integrated circuit chip on said substrate. A clamping force is applied to the first and second portions of the mold to clamp the substrate between them with the integrated circuit chip located in the first cavity. Vents exhaust air from the first cavity. Encapsulant is injected into the first cavity of the first portion at a location in the first portion remote from the point of connection of the channel such that encapsulant flows around and underneath the integrated circuit chip and through the channel into the second cavity to thereby underfill and encapsulate the integrated circuit assembly.

Abstract: A method, mold and apparatus for encapsulating and underfilling an integrated circuit chip assembly. The mold has a first portion and a second portion with the first portion having first and second cavities and at least one channel interconnecting said first and second cavities. The first cavity is adapted to enclose said integrated circuit chip on said substrate. A clamping force is applied to the first and second portions of the mold to clamp the substrate between them with the integrated circuit chip located in the first cavity. Vents exhaust air from the first cavity. Encapsulant is injected into the first cavity of the first portion at a location in the first portion remote from the point of connection of the channel such that encapsulant flows around and underneath the integrated circuit chip and through the channel into the second cavity to thereby underfill and encapsulate the integrated circuit assembly.

Abstract: A heat sink for a transceiver optoelectronic module including dual direct heat paths and a structure which encloses a number of chips having a central web which electrically isolates transmitter and receiver chips from each other. A retainer for an optical coupler having a port into which epoxy is poured. An overmolded base for an optoelectronic module having epoxy flow controller members built thereon. Assembly methods for an optoelectronic module including gap setting and variation of a TAB bonding process.

Abstract: A method, mold and apparatus for encapsulating and underfilling an integrated circuit chip assembly. The mold has a first portion and a second portion with the first portion having first and second cavities and at least one channel interconnecting said first and second cavities. The first cavity is adapted to enclose said integrated circuit chip on said substrate. A clamping force is applied to the first and second portions of the mold to clamp the substrate between them with the integrated circuit chip located in the first cavity. Vents exhaust air from the first cavity. Encapsulant is injected into the first cavity of the first portion at a location in the first portion remote from the point of connection of the channel such that encapsulant flows around and underneath the integrated circuit chip and through the channel into the second cavity to thereby underfill and encapsulate the integrated circuit assembly.

Abstract: There is provided a method, mold and apparatus for encapsulating and underfilling an integrated circuit chip assembly including an integrated circuit chip mounted on a substrate in a standoff relationship. The mold has a first portion and a second portion with the first portion having first and second cavities and at least one channel interconnecting said first and second cavities. The first cavity is adapted to enclose said integrated circuit chip on said substrate. Means, e.g., a clamp, applies a clamping force to the first and the second portions of the mold to clamp the substrate between the first and second portions with the integrated circuit chip located in the first cavity. Vent means exhausts air from the first cavity.

Abstract: Alignment systems for optoelectronic modules with overmolded chip carriers include drilled or milled substrate corners for engaging dowel pins to precisely align the substrate in a mold for molding an overmold frame on the substrate. The overmold frame includes slot and trilobe holes for receiving retainer posts to precisely align a retainer assembly on the overmold frame. Cooperating standoff pads on the overmold frame and on the retainer assembly stabilize the assembly of these components and provide a precise gap for receiving an adhesive to permanently attach these two components. The retainer assembly carries optoelectronic components that include a flexible circuit, and a distal end portion of this flexible circuit and walls of a receiving cavity in the overmold frame have cooperating features for precisely aligning distal electrical leads of the flexible circuit with an array of electrical pads on the substrate.

Abstract: A heat sink for a transceiver optoelectronic module including dual direct heat paths and a structure which encloses a number of chips having a central web which electrically isolates transmitter and receiver chips from each other. A retainer for an optical coupler having a port into which epoxy is poured. An overmolded base for an optoelectronic module having epoxy flow controller members built thereon. Assembly methods for an optoelectronic module including gap setting and variation of a TAB bonding process.

Abstract: A heat sink for a transceiver optoelectronic module including dual direct heat paths and structure which encloses a number of chips having a central web which electrically isolates transmitter and receiver chips from each other. A retainer for an optical coupler having a port into which epoxy is poured. An overmolded base for an optoelectronic module having epoxy flow controller members built thereon. Assembly methods for an optoelectronic module including gap setting and variation of a TAB bonding process.

Abstract: There is provided a method, mold and apparatus for encapsulating and underfilling an integrated circuit chip assembly including an integrated circuit chip mounted on a substrate in a standoff relationship. The mold has a first portion and a second portion with the first portion having first and second cavities and at least one channel interconnecting said first and second cavities. The first cavity is adapted to enclose said integrated circuit chip on said substrate. Means, e.g., a clamp, applies a clamping force to the first and the second portions of the mold to clamp the substrate between the first and second portions with the integrated circuit chip located in the first cavity. Vent means exhausts air from the first cavity.

Abstract: A method and resulting integrated circuit package is disclosed for encapsulating integrated circuit chips using transfer molding techniques in a form known as cavity packages. Each chip is positioned within a cavity surrounded by a laminate or printed wiring board which provides an array of contacts. The contacts provide for connections to an external circuit board/card and the contacts are also indirectly connected internally to the chip. The cavity, chip and some of the laminate, contacts and interconnections are on the same side of the carrier. Liquid plastic is forced into the cavity via a runner in a mold through a gate in the bottom of the carrier in order to encapsulate all of these components.

Abstract: A method and resulting integrated circuit package is disclosed for encapsulating integrated circuit chips using transfer molding techniques in a form known as cavity packages. Each chip is positioned within a cavity surrounded by a laminate or printed wiring board which provides an array of contacts. The contacts provide for connections to an external circuit board/card and the contacts are also indirectly connected internally to the chip. The cavity, chip and some of the laminate, contacts and interconnections are on the same side of the carrier. Liquid plastic is forced into the cavity via a runner in a mold through a gate in the bottom of the carrier in order to encapsulate all of these components.