Abstract: A laminate includes a first glass article having a first thickness, a first annealing point (TA1), and a first softening point (TS1), a second glass article having a second thickness, a second annealing point (TA2), and a second softening point (TS2), and an interlayer disposed between the first glass article and the second glass article. The first thickness is greater than the second thickness, the second annealing point (TA2) is less than or equal to the first annealing point (TA1), and the second softening point (TS2) is greater than the first softening point (TS1).

Abstract: The present disclosure provides polymer conjugates comprising a polymer and an agent the agent linked to the polymer via a linking group containing a cleavable moiety.

Abstract: Therapeutic modalities are provided involving the use of specific repertoirs of PRR ligands to ameliorate immune dysregulation in a perioperative period. In effect, innate immune system signaling is provoked in the perioperative period so as to facilitate a targeted immune response following surgery. Subjects may accordingly be treated with immunogenic formulations tailored to a specific target tissue to treat a subject during the perioperative period surrounding surgery to remove a solid tumor, where the target tissue is the site of the tumor or a characteristic site of metastasis for the cancer.

Abstract: Embodiments described herein are generally directed to improving performance of high-performance computing (HPC) or artificial intelligence (AI) workloads on cluster computer systems. According to one embodiment, a section of a high-performance computing (HPC) or artificial intelligence (AI) workload executing on a cluster computer system is identified as significant to a figure of merit (FOM) of the workload. An alternate placement among multiple heterogeneous compute resources of a node of the cluster computer system is determined for a portion of the section currently executing on a given compute resource of the multiple heterogeneous compute resources. After predicting an improvement to the FOM based on the alternate placement, the portion is relocated to the alternate placement.

Abstract: Embodiments described herein provide techniques to maintain high temporal cache locality between independent threads having the same or similar memory access pattern. One embodiment provides a graphics processing unit comprising an instruction execution pipeline including hardware execution logic and a thread dispatcher to process a set of commands for execution and distribute multiple groups of hardware threads to the hardware execution logic to execute the set of commands. The thread dispatcher can be configured to concurrently distribute a first group of the multiple groups of hardware threads to the hardware execution logic and withhold distribution of additional hardware threads for the set of commands until after the first group completes execution.