Patents by Inventor Rebecca McTaggart

Rebecca McTaggart has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Double recessed transistor
    Publication number: 20030207508
    Abstract: A transistor structure is provided. This structure has a source electrode and a drain electrode. A doped cap layer of GaxIn1-xAs is disposed below the source electrode and the drain electrode and provides a cap layer opening. An undoped resistive layer of GaxIn1−xAs is disposed below the cap layer and defines a resistive layer opening in registration with the cap layer opening and having a first width. A Schottky layer of AlyIn1−yAs is disposed below the resistive layer. An undoped channel layer is disposed below the Schottky layer. A semi-insulating substrate is disposed below the channel layer. A top surface of the Schottky layer beneath the resistive layer opening provides a recess having a second width smaller than the first width. A gate electrode is in contact with a bottom surface of the recess provided by the Schottky layer.
    Type: Application
    Filed: May 6, 2003
    Publication date: November 6, 2003
    Inventors: William E. Hoke, Katerina Hur, Rebecca McTaggart
  • Gate electrode formation in double-recessed transistor by two-step etching
    Patent number: 6573129
    Abstract: A transistor structure is provided. This structure has a source electrode and a drain electrode. A doped cap layer of GaxIn1−xAs is disposed below the source electrode and the drain electrode and provides a cap layer opening. An undoped resistive layer of GaxIn1−xAs is disposed below the cap layer and defines a resistive layer opening in registration with the cap layer opening and having a first width. A Schottky layer of AlyIn1−yAs is disposed below the resistive layer. An undoped channel layer is disposed below the Schottky layer. A semi-insulating substrate is disposed below the channel layer. A top surface of the Schottky layer beneath the resistive layer opening provides a recess having a second width smaller than the first width. A gate electrode is in contact with a bottom surface of the recess provided by the Schottky layer.
    Type: Grant
    Filed: May 31, 2001
    Date of Patent: June 3, 2003
    Assignee: Raytheon Company
    Inventors: William E. Hoke, Katerina Hur, Rebecca McTaggart
  • Double recessed transistor
    Publication number: 20010029073
    Abstract: A transistor structure is provided. This structure has a source electrode and a drain electrode. A doped cap layer of GaxIn1-xAs is disposed below the source electrode and the drain electrode and provides a cap layer opening. An undoped resistive layer of GaxIn1-xAs is disposed below the cap layer and defines a resistive layer opening in registration with the cap layer opening and having a first width. A Schottky layer of AlyIn1-yAs is disposed below the resistive layer. An undoped channel layer is disposed below the Schottky layer. A semi-insulating substrate is disposed below the channel layer. A top surface of the Schottky layer beneath the resistive layer opening provides a recess having a second width smaller than the first width. A gate electrode is in contact with a bottom surface of the recess provided by the Schottky layer.
    Type: Application
    Filed: May 31, 2001
    Publication date: October 11, 2001
    Inventors: William E. Hoke, Katerina Hur, Rebecca McTaggart
  • Double recessed transistor with resistive layer
    Patent number: 6271547
    Abstract: A transistor structure is provided. This structure has a source electrode and a drain electrode. A doped cap layer of GaxIn1−xAs is disposed below the source electrode and the drain electrode and provides a cap layer opening. An undoped resistive layer of GaxIn1−xAs is disposed below the cap layer and defines a resistive layer opening in registration with the cap layer opening and having a first width. A Schottky layer of AlyIn1−yAs is disposed below the resistive layer. An undoped channel layer is disposed below the Schottky layer. A semi-insulating substrate is disposed below the channel layer. A top surface of the Schottky layer beneath the resistive layer opening provides a recess having a second width smaller than the first width. A gate electrode is in contact with a bottom surface of the recess provided by the Schottky layer.
    Type: Grant
    Filed: August 6, 1999
    Date of Patent: August 7, 2001
    Assignee: Raytheon Company
    Inventors: William E. Hoke, Katerina Hur, Rebecca McTaggart