Abstract: A Direct Memory Access (DMA) Acceleration Device for substantially increasing a data transfer rate between a system memory and an Input/Output (I/O) device for use in a data processing system. The DMA Acceleration Device enables the system to subtantially double a data transfer rate between the system memory and the I/O device by generating necessary control and address signals. In a receive operation, the DMA Acceleration Device reads the data from the I/O device while the host processor simultaneously writes the previous data to the system memory. Similarly, in a transmit operation, the DMA Acceleration Device writes the data to the I/O device while the host processor simultaneously reads the subsequent data from the system memory. Transmit and Receive State Machines of the DMA Acceleration Device are programmed to control the sequencing of signals during the DMA mode, while being absolutely transparent to the system in a non-DMA mode of operation.