Patents by Inventor Reece A. Defrees

Reece A. Defrees has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220416097
    Abstract: A photodetector structure over a partial length of a silicon waveguide structure within a photonic integrated circuit (PIC) chip. The photodetector structure is embedded within a cladding material surrounding the waveguide structure. The photodetector structure includes an absorption region, for example comprising Ge. A sidewall of the cladding material may be lined with a sacrificial spacer. After forming the absorption region, the sacrificial spacer may be removed and passivation material formed over a sidewall of the absorption region. Between the absorption region an impurity-doped portion of the waveguide structure there may be a carrier multiplication region, for example comprising crystalline silicon. If present, edge facets of the carrier multiplication region may be protected by a spacer material during the formation of an impurity-doped charge carrier layer. Occurrence of edge facets may be mitigated by embedding a portion of the photodetector structure with a thickness of the waveguide structure.
    Type: Application
    Filed: June 25, 2021
    Publication date: December 29, 2022
    Applicant: Intel Corporation
    Inventors: David Kohen, Kelly Magruder, Parastou Fakhimi, Zhi Li, Cung Tran, Wei Qian, Mark Isenberger, Mengyuan Huang, Harel Frish, Reece DeFrees, Ansheng Liu
  • Publication number: 20220084936
    Abstract: Embedded three-dimensional electrode capacitors, and methods of fabricating three-dimensional electrode capacitors, are described. In an example, an integrated circuit structure includes a first metallization layer above a substrate, the first metallization layer having a first conductive structure in a first dielectric layer, the first conductive structure having a honeycomb pattern. An insulator structure is on the first conductive structure of the first metallization layer. A second metallization layer is above the first metallization layer, the second metallization layer having a second conductive structure in a second dielectric layer, the second conductive structure on the insulator structure, and the second conductive structure having the honeycomb pattern.
    Type: Application
    Filed: September 17, 2020
    Publication date: March 17, 2022
    Inventors: Wei QIAN, Cung TRAN, Sungbong PARK, John HECK, Mark ISENBERGER, Seth SLAVIN, Mengyuan HUANG, Kelly MAGRUDER, Harel FRISH, Reece DEFREES, Zhi LI
  • Publication number: 20210318561
    Abstract: A method may include: forming a base layer on a substrate; forming a waveguide assembly on the base layer, where the waveguide assembly is surrounded by a cladding layer; forming a trench opening through the cladding layer and the base layer; forming an undercut void by etching the substrate through the trench opening, where the undercut void extends under the waveguide assembly and the base layer; and filling the trench opening with a filler to seal off the undercut void. Other embodiments are described and claimed.
    Type: Application
    Filed: June 25, 2021
    Publication date: October 14, 2021
    Inventors: Meer Nazmus Sakib, Saeed Fathololoumi, Harel Frish, John Heck, Eddie Bononcini, Reece Defrees, Stanley J. Dobek, Aliasghar Eftekhar, Walter Garay, Lingtao Liu, Wei Qian
  • Patent number: 10996408
    Abstract: Embodiments of the present disclosure are directed toward techniques and configurations for an optical coupler including an optical waveguide to guide light to an optical fiber. In embodiments, the optical waveguide includes a tapered segment to propagate the received light to the optical fiber. In embodiments, the tapered segment is buried below a surface of a semiconductor substrate to transition the received light within the semiconductor substrate from a first optical mode to a second optical mode to reduce a loss of light during propagation of the received light from the optical waveguide to the optical fiber. In embodiments, the surface of the semiconductor substrate comprises a bottom planar surface of a silicon photonic chip that includes at least one or more of passive or active photonic components. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: July 19, 2019
    Date of Patent: May 4, 2021
    Assignee: Intel Corporation
    Inventors: John Heck, Harel Frish, Reece DeFrees, George A. Ghiurcan, Hari Mahalingam, Pegah Seddighian
  • Publication number: 20190339466
    Abstract: Embodiments of the present disclosure are directed toward techniques and configurations for an optical coupler including an optical waveguide to guide light to an optical fiber. In embodiments, the optical waveguide includes a tapered segment to propagate the received light to the optical fiber. In embodiments, the tapered segment is buried below a surface of a semiconductor substrate to transition the received light within the semiconductor substrate from a first optical mode to a second optical mode to reduce a loss of light during propagation of the received light from the optical waveguide to the optical fiber. In embodiments, the surface of the semiconductor substrate comprises a bottom planar surface of a silicon photonic chip that includes at least one or more of passive or active photonic components. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: July 19, 2019
    Publication date: November 7, 2019
    Inventors: John Heck, Harel Frish, Reece DeFrees, George A. Ghiurcan, Hari Mahalingam, Pegah Seddighian
  • Publication number: 20190129095
    Abstract: Embodiments may relate to a silicon photonic chip, and particularly a back absorber within the silicon photonic chip. The back absorber may include a substrate material with a slab portion that includes a doped portion of the substrate material. The back absorber may be positioned at the backside of a laser that is configured to project light along a waveguide of the silicon photonic chip. Other embodiments may be described or claimed.
    Type: Application
    Filed: December 11, 2018
    Publication date: May 2, 2019
    Applicant: Intel Corporation
    Inventors: Kimchau Nhu Nguyen, George A. Ghiurcan, Yoel Chetrit, Jeffrey B. Driscoll, Richard Jones, Harel Frish, Reece A. Defrees, Wenhua Lin, Jung S. Park