Patents by Inventor Regis Duchesne

Regis Duchesne has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210224090
    Abstract: An example method of interfacing with a hypervisor in a computing system is described, which includes a processor having at least three hierarchical privilege levels including a third privilege level more privileged than a second privilege level, the second privilege level more privileged than a first privilege level.
    Type: Application
    Filed: January 16, 2020
    Publication date: July 22, 2021
    Inventors: Andrei WARKENTIN, Cyprien LAPLACE, Regis DUCHESNE, Alexander FAINKICHEN, Shruthi Muralidhara HIRIYURU, Ye LI
  • Publication number: 20210224089
    Abstract: An example method of interfacing with a hypervisor in a computing system is described. The computing system includes a processor having at least three hierarchical privilege levels including a third privilege level more privileged than a second privilege level, the second privilege level more privileged than a first privilege level. The method includes configuring, by the hypervisor executing at the third privilege level, the processor to trap reads to a debug communication channel (DCC) status register of the processor to the third privilege level; trapping, at the hypervisor, a read to the DCC status register by guest software executing in a virtual machine (VM) managed by the hypervisor, the guest software executing at the first or second privilege level; reading, at the hypervisor, a plurality of registers of the processor to obtain data stored by the guest software; and returning execution from the hypervisor to the guest software.
    Type: Application
    Filed: January 16, 2020
    Publication date: July 22, 2021
    Inventors: Cyprien LAPLACE, Regis DUCHESNE, Andrei WARKENTIN, Ye LI, Alexander FAINKICHEN
  • Patent number: 11042485
    Abstract: An example method of implementing firmware runtime services in a computer system having a processor with a plurality of hierarchical privilege levels, the method including: calling, from software executing at a first privilege level of the processor, a runtime service stub in a firmware of the computer system; executing, by the runtime service stub, an upcall instruction from the first privilege level to a second privilege level of the processor that is more privileged than the first privilege level; and executing, by a handler, a runtime service at the second privilege level in response to execution of the upcall instruction.
    Type: Grant
    Filed: June 20, 2018
    Date of Patent: June 22, 2021
    Assignee: VMware, Inc.
    Inventors: Andrei Warkentin, Cyprien Laplace, Alexander Fainkichen, Ye Li, Regis Duchesne
  • Publication number: 20210133315
    Abstract: System and method for creating and managing trusted execution environments (TEEs) using different underlying hardware TEE mechanisms use a virtual secure enclave device which runs in a virtualized environment in a computer system. The device enables an enclave command transmitted to the virtual secure enclave device to be retrieved and parsed to extract an enclave operation to be executed. A TEE backend module is used to interact with a particular hardware TEE mechanism among those available in the computer system. The module ensures the enclave operation for the software process is executed by the particular hardware TEE mechanism, or the TEE scheme based on a particular hardware TEE mechanism.
    Type: Application
    Filed: October 31, 2019
    Publication date: May 6, 2021
    Inventors: Ye LI, David OTT, Cyprien LAPLACE, Andrei WARKENTIN, Regis DUCHESNE
  • Patent number: 10922253
    Abstract: Disclosed are various embodiments for software-based interrupt remapping. A memory address for a respective interrupt request of the peripheral device is allocated. The peripheral device is then configured to write to the memory address to raise an interrupt with the processor. Later, it can be determined that the peripheral device has attempted to write to the memory address. In response, an interrupt can be raised for the respective interrupt request with the processor of the computing device on behalf of the peripheral device.
    Type: Grant
    Filed: October 22, 2019
    Date of Patent: February 16, 2021
    Assignee: VMWARE, INC.
    Inventors: Regis Duchesne, Alexander Fainkichen, Cyprien Laplace, Ye Li, Andrei Warkentin
  • Publication number: 20210026648
    Abstract: A method for generating boot tables for a device having access to device information. It is determined whether there exists at least one system boot table stored in a memory. If it is determined that a system boot table does not exist, the device information is retrieved, and the device information is converted to at least one boot table. The converting includes generating a first boot table by populating the first boot table with information of components of the device that have a correspondence to a computer system boot information standard. The generating also includes generating a second boot table for another component of the device that does not have a correspondence to the computer system boot information standard, by creating an entry in the second boot table that is populated with an identifier used to find a compatible component defined in the computer system boot standard.
    Type: Application
    Filed: July 24, 2019
    Publication date: January 28, 2021
    Inventors: Andrei WARKENTIN, Cyprien LAPLACE, Ye LI, Alexander FAINKICHEN, Regis DUCHESNE
  • Patent number: 10776287
    Abstract: An example method of accessing a computing system includes: providing serial terminal driver configured to interface a serial port in a hardware platform of the computer system; providing a console object configured to communicate with an operating system (OS) in a software platform of the computer system and the serial terminal driver; connecting to the console object through the serial port via a computer terminal; sending text and commands from the console object to the computer terminal; and rendering, by the computer terminal, a console for presentation on a display of the computer terminal.
    Type: Grant
    Filed: February 19, 2018
    Date of Patent: September 15, 2020
    Assignee: VMware, Inc.
    Inventors: Andrei Warkentin, Cyprien Laplace, Ye Li, Alexander Fainkichen, Regis Duchesne
  • Patent number: 10698783
    Abstract: A method of detecting virtualization in a computing system, which includes a processor having at least three hierarchical privilege levels including a third privilege level more privileged than a second privilege level, the second privilege level more privileged than a first privilege level, is described. The method includes: executing a program on the processor at a privilege level less privileged than the third privilege level, the program including a load-exclusive instruction of the processor, followed by at least one instruction of the processor capable of being trapped to the third privilege level, followed by a store-exclusive instruction of the processor; and determining presence or absence of virtualization software at least a portion of which executes at the third privilege level in response to a return status of the store-exclusive instruction.
    Type: Grant
    Filed: January 9, 2018
    Date of Patent: June 30, 2020
    Assignee: VMware, Inc.
    Inventors: Andrei Warkentin, Cyprien Laplace, Regis Duchesne, Ye Li, Alexander Fainkichen
  • Patent number: 10642751
    Abstract: An example method of scanning a guest virtual address (GVA) space generated by a guest operating system executing in a virtual machine of a virtualized computing system includes setting, in a scan of the GVA space by a hypervisor that manages the virtual machine, a current GVA to a first GVA in the GVA space; executing, on a processor allocated to the virtual machine, an address translation instruction, which is in an instruction set of the processor, to perform a first address translation of the current GVA; reading a register of the processor to determine a first error resulting from the first address translation; determining, in response to the first error, a level of a faulting page table in a first page table hierarchy generated by the guest operating system; and setting the current GVA to a second GVA based on the level of the faulting page table.
    Type: Grant
    Filed: July 20, 2017
    Date of Patent: May 5, 2020
    Assignee: VMware, Inc.
    Inventors: Andrei Warkentin, Alexander Fainkichen, Cyprien Laplace, Ye Li, Regis Duchesne
  • Patent number: 10552172
    Abstract: An example method of provisioning a virtual appliance to a virtualized computing system, comprising: deploying the virtual appliance to the virtualized computing system, the virtual appliance including a system partition, one or more disk images, and configuration data, the configuration data defining a virtual machine executable on each of a plurality of processor architectures, the system partition configured to boot on any one of the plurality of processor architectures; and booting the virtual appliance from the system partition.
    Type: Grant
    Filed: January 26, 2018
    Date of Patent: February 4, 2020
    Assignee: VMware, Inc.
    Inventors: Ye Li, Cyprien Laplace, Andrei Warkentin, Alexander Fainkichen, Regis Duchesne
  • Publication number: 20190391814
    Abstract: An example method of implementing firmware runtime services in a computer system having a processor with a plurality of hierarchical privilege levels, the method including: calling, from software executing at a first privilege level of the processor, a runtime service stub in a firmware of the computer system; executing, by the runtime service stub, an upcall instruction from the first privilege level to a second privilege level of the processor that is more privileged than the first privilege level; and executing, by a handler, a runtime service at the second privilege level in response to execution of the upcall instruction.
    Type: Application
    Filed: June 20, 2018
    Publication date: December 26, 2019
    Inventors: Andrei WARKENTIN, Cyprien LAPLACE, Alexander FAINKICHEN, Ye LI, Regis DUCHESNE
  • Publication number: 20190258590
    Abstract: An example method of accessing a computing system includes: providing serial terminal driver configured to interface a serial port in a hardware platform of the computer system; providing a console object configured to communicate with an operating system (OS) in a software platform of the computer system and the serial terminal driver; connecting to the console object through the serial port via a computer terminal; sending text and commands from the console object to the computer terminal; and rendering, by the computer terminal, a console for presentation on a display of the computer terminal.
    Type: Application
    Filed: February 19, 2018
    Publication date: August 22, 2019
    Inventors: Andrei WARKENTIN, Cyprien LAPLACE, Ye LI, Alexander FAINKICHEN, Regis DUCHESNE
  • Patent number: 10379870
    Abstract: A method of initializing a secondary processor pursuant to a soft reboot of system software comprises storing code to be executed by the secondary processor in memory, building first page tables to map the code into a first address space and second page tables to identically map the code into a second address space, fetching a first instruction of the code based on a first virtual address in the first address space and the first page tables, and executing the code beginning with the first instruction to switch from the first to the second page tables. The method further comprises, fetching a next instruction of the code using a second virtual address, which is identically mapped to a corresponding machine address, turning off a memory management unit of the secondary processor, and executing a waiting loop until a predetermined location in the physical memory changes in value.
    Type: Grant
    Filed: July 7, 2017
    Date of Patent: August 13, 2019
    Assignee: VMware, Inc.
    Inventors: Andrei Warkentin, Cyprien Laplace, Regis Duchesne, Alexander Fainkichen, Ye Li
  • Publication number: 20190227934
    Abstract: An example method of maintaining cache coherency in a virtualized computing system includes: trapping access to a memory page by guest software in a virtual machine at a hypervisor managing the virtual machine, where the memory page is not mapped in a second stage page table managed by the hypervisor; performing cache coherency maintenance for instruction and data caches of a central processing unit (CPU) in the virtualized computing system in response to the trap; mapping the memory page in the second stage page table with execute permission; and resuming execution of the virtual machine.
    Type: Application
    Filed: January 23, 2018
    Publication date: July 25, 2019
    Inventors: Ye LI, Cyprien LAPLACE, Andrei WARKENTIN, Alexander FAINKICHEN, Regis DUCHESNE
  • Publication number: 20190213095
    Abstract: A method of detecting virtualization in a computing system, which includes a processor having at least three hierarchical privilege levels including a third privilege level more privileged than a second privilege level, the second privilege level more privileged than a first privilege level, is described. The method includes: executing a program on the processor at a privilege level less privileged than the third privilege level, the program including a load-exclusive instruction of the processor, followed by at least one instruction of the processor capable of being trapped to the third privilege level, followed by a store-exclusive instruction of the processor; and determining presence or absence of virtualization software at least a portion of which executes at the third privilege level in response to a return status of the store-exclusive instruction.
    Type: Application
    Filed: January 9, 2018
    Publication date: July 11, 2019
    Inventors: Andrei WARKENTIN, Cyprien LAPLACE, Regis DUCHESNE, Ye LI, Alexander FAINKICHEN
  • Publication number: 20190213033
    Abstract: Techniques for optimizing CPU usage in a host system based on VM guest OS power and performance management are provided. In one embodiment, a hypervisor of the host system can capture information from a VM guest OS that pertains to a target power or performance state set by the guest OS for a vCPU of the VM. The hypervisor can then perform, based on the captured information, one or more actions that align usage of host CPU resources by the vCPU with the target power or performance state.
    Type: Application
    Filed: March 15, 2019
    Publication date: July 11, 2019
    Inventors: Andrei Warkentin, Cyprien Laplace, Regis Duchesne, Ye Li, Alexander Fainkichen
  • Patent number: 10282226
    Abstract: Techniques for optimizing CPU usage in a host system based on VM guest OS power and performance management are provided. In one embodiment, a hypervisor of the host system can capture information from a VM guest OS that pertains to a target power or performance state set by the guest OS for a vCPU of the VM. The hypervisor can then perform, based on the captured information, one or more actions that align usage of host CPU resources by the vCPU with the target power or performance state.
    Type: Grant
    Filed: December 20, 2016
    Date of Patent: May 7, 2019
    Assignee: VMWARE, INC.
    Inventors: Andrei Warkentin, Cyprien Laplace, Regis Duchesne, Ye Li, Alexander Fainkichen
  • Publication number: 20190065213
    Abstract: An example method of provisioning a virtual appliance to a virtualized computing system, comprising: deploying the virtual appliance to the virtualized computing system, the virtual appliance including a system partition, one or more disk images, and configuration data, the configuration data defining a virtual machine executable on each of a plurality of processor architectures, the system partition configured to boot on any one of the plurality of processor architectures; and booting the virtual appliance from the system partition.
    Type: Application
    Filed: January 26, 2018
    Publication date: February 28, 2019
    Inventors: Ye LI, Cyprien LAPLACE, Andrei WARKENTIN, Alexander FAINKICHEN, Regis DUCHESNE
  • Publication number: 20190026232
    Abstract: An example method of scanning a guest virtual address (GVA) space generated by a guest operating system executing in a virtual machine of a virtualized computing system includes setting, in a scan of the GVA space by a hypervisor that manages the virtual machine, a current GVA to a first GVA in the GVA space; executing, on a processor allocated to the virtual machine, an address translation instruction, which is in an instruction set of the processor, to perform a first address translation of the current GVA; reading a register of the processor to determine a first error resulting from the first address translation; determining, in response to the first error, a level of a faulting page table in a first page table hierarchy generated by the guest operating system; and setting the current GVA to a second GVA based on the level of the faulting page table.
    Type: Application
    Filed: July 20, 2017
    Publication date: January 24, 2019
    Inventors: Andrei WARKENTIN, Alexander FAINKICHEN, Cyprien LAPLACE, Ye LI, Regis DUCHESNE
  • Patent number: 10185664
    Abstract: A method of re-mapping a boot loader image from a first to a second address space includes: determining a difference in a virtual address of the boot loader image in the first and second address spaces; building page tables for a third address space that maps a code section within the boot loader image at first and second address ranges separated by the difference and the code section causes execution to jump from a first instruction in the first address range to a second instruction in the second address range; executing an instruction of the code section in the first address space using pages tables for the first address space; executing the first instruction and then the second instruction using the page tables for the third address space; and executing an instruction of the boot loader image in the second address space using page tables for the second address space.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: January 22, 2019
    Assignee: VMware, Inc.
    Inventors: Andrei Warkentin, Cyprien Laplace, Regis Duchesne, Alexander Fainkichen, Ye Li