Patents by Inventor Rehan Ahmed Zakai

Rehan Ahmed Zakai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11456022
    Abstract: The present disclosure generally relates to apparatuses and methods for transmission line termination. In one embodiment an apparatus includes a stack of uniform memory dies and a storage controller. Each uniform memory die in the stack of uniform memory dies couples to a transmission line in series through wire bonds to form a transmission path. Each memory die includes an on-die termination resistance circuit connected to the transmission line. The on-die termination resistance circuit provides a minimum termination resistance. The storage controller addresses a target uniform memory die of the stack of uniform memory dies for an operation. The storage controller enables the on-die termination resistance circuits of a plurality of uniform memory dies along the transmission path. The storage controller transmits a data signal for the operation to the target uniform memory die with the on-die termination resistance circuit enabled for the plurality of uniform memory dies.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: September 27, 2022
    Assignee: Western Digital Technologies, Inc.
    Inventors: John Thomas Contreras, Srinivas Rajendra, Sayed Mobin, Rehan Ahmed Zakai
  • Patent number: 11303276
    Abstract: An active termination circuit comprising an input node connected to a transmission line, a first transistor, and a second transistor. The transmission line supplies a signal to the input node. The first transistor is diode connected between a high voltage supply and the input node. The first transistor terminates the signal when the signal is at a low logic level. The second transistor is diode connected between the input node and a low voltage supply. The second transistor terminates the signal when the signal is at a high logic level.
    Type: Grant
    Filed: February 26, 2021
    Date of Patent: April 12, 2022
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: John Thomas Contreras, Rehan Ahmed Zakai, Srinivas Rajendra, Venkatesh Prasad Ramachandra
  • Patent number: 11302645
    Abstract: A circuit interconnect for high bandwidth and high die-count memory stacks. The circuit interconnect may include a first ground trace, a first signal trace, a second ground trace, and a second signal trace. The first ground trace may reside in a first layer of a multilayer printed circuit board. The first signal trace may be positioned adjacent to the first ground trace within the first layer. The second ground trace may reside within a second layer of the multilayer printed circuit board. The second signal trace may be positioned adjacent to the second ground trace within the second layer.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: April 12, 2022
    Assignee: Western Digital Technologies, Inc.
    Inventors: John Thomas Contreras, Sayed Mobin, Daniel Oh, Rehan Ahmed Zakai
  • Publication number: 20220052688
    Abstract: An active termination circuit comprising an input node connected to a transmission line, a first transistor, and a second transistor. The transmission line supplies a signal to the input node. The first transistor is diode connected between a high voltage supply and the input node. The first transistor terminates the signal when the signal is at a low logic level. The second transistor is diode connected between the input node and a low voltage supply. The second transistor terminates the signal when the signal is at a high logic level.
    Type: Application
    Filed: February 26, 2021
    Publication date: February 17, 2022
    Inventors: John Thomas CONTRERAS, Rehan Ahmed ZAKAI, Srinivas RAJENDRA, Venkatesh Prasad RAMACHANDRA
  • Publication number: 20210407915
    Abstract: A circuit interconnect for high bandwidth and high die-count memory stacks. The circuit interconnect may include a first ground trace, a first signal trace, a second ground trace, and a second signal trace. The first ground trace may reside in a first layer of a multilayer printed circuit board. The first signal trace may be positioned adjacent to the first ground trace within the first layer. The second ground trace may reside within a second layer of the multilayer printed circuit board. The second signal trace may be positioned adjacent to the second ground trace within the second layer.
    Type: Application
    Filed: June 30, 2020
    Publication date: December 30, 2021
    Applicant: Western Digital Technologies, Inc.
    Inventors: John Thomas Contreras, Sayed Mobin, Daniel Oh, Rehan Ahmed Zakai
  • Publication number: 20210407565
    Abstract: The disclosed apparatuses and method provide transmission line termination. An apparatus include a stack of uniform memory dies and a storage controller. Each uniform memory die in the stack of uniform memory dies couples to a transmission line in series through wire bonds to form a transmission path. Each memory die includes an on-die termination resistance circuit connected to the transmission line. The on-die termination resistance circuit provides a minimum termination resistance. The storage controller addresses a target uniform memory die of the for an operation. The storage controller enables the on-die termination resistance circuits of a plurality of uniform memory dies along the transmission path. The storage controller transmits a data signal for the operation to the target uniform memory die with the on-die termination resistance circuit enabled for the plurality of uniform memory dies.
    Type: Application
    Filed: June 30, 2020
    Publication date: December 30, 2021
    Applicant: Western Digital Technologies, Inc.
    Inventors: John Thomas Contreras, Srinivas Rajendra, Sayed Mobin, Rehan Ahmed Zakai
  • Patent number: 10564053
    Abstract: Embodiments disclosed herein generally relate to a method for monitoring optical power in a HAMR device. In one embodiment, the method includes enhancing a thermal sensor bandwidth through advanced electrical detection techniques. The advanced electrical detection techniques include obtaining calibration waveform data for a thermal sensor by calibrating the thermal sensor, obtaining real-time waveform data for the thermal sensor that may deviate from the calibration waveform data, updating the calibration waveform data to include the real-time waveform data, repeating obtaining real-time waveform data and updating the calibration waveform data during writing operations. By updating the calibration waveform data, the bandwidth of the thermal sensor is determined by a fixed sampling time interval, and the thermal sensor rise time to steady state would not be a limitation to its response time.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: February 18, 2020
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: John T. Contreras, Lidu Huang, Shen Ren, Erhard Schreck, Rehan Ahmed Zakai
  • Publication number: 20190120705
    Abstract: Embodiments disclosed herein generally relate to a method for monitoring optical power in a HAMR device. In one embodiment, the method includes enhancing a thermal sensor bandwidth through advanced electrical detection techniques. The advanced electrical detection techniques include obtaining calibration waveform data for a thermal sensor by calibrating the thermal sensor, obtaining real-time waveform data for the thermal sensor that may deviate from the calibration waveform data, updating the calibration waveform data to include the real-time waveform data, repeating obtaining real-time waveform data and updating the calibration waveform data during writing operations. By updating the calibration waveform data, the bandwidth of the thermal sensor is determined by a fixed sampling time interval, and the thermal sensor rise time to steady state would not be a limitation to its response time.
    Type: Application
    Filed: December 21, 2018
    Publication date: April 25, 2019
    Inventors: John T. CONTRERAS, Lidu HUANG, Shen REN, Erhard SCHRECK, Rehan Ahmed ZAKAI
  • Patent number: 9218822
    Abstract: Interconnect and preamplifier designs are described for use in a disk drive with a common signal return lead system that interconnects a plurality of read transducers (readers) in a slider through the suspension to the preamplifier mounted on the actuator. Preamplifier embodiments have an isolated differential amplifier for each of the plurality of readers in the slider. The set of signal traces in the suspension include a common signal return lead for the plurality of readers in the slider. A preamplifier circuit design according to an embodiment of the invention includes isolated amplifiers for each reader with a separate bias source and power supply isolation elements for both power supply polarities for reduced crosstalk signal and noise between amplifiers.
    Type: Grant
    Filed: May 13, 2015
    Date of Patent: December 22, 2015
    Assignee: HGST Netherlands B.V.
    Inventors: John Contreras, Samir Y. Garzon, Rehan Ahmed Zakai
  • Patent number: 9196266
    Abstract: An interconnect between the read/write circuitry and the read/write head in a magnetic recording hard disk drive (HDD) for two-dimensional magnetic recording (TDMR) has the read sensor signal lines located on a lower level of a bi-level structure of conductive lines. Common return lines are located on an upper level above the signal lines and on the lower level between the signal lines. All of the return lines on the upper level are connected to one another by cross-connect lines, and vias are located along the interconnect and connect the upper return lines with the lower return lines and with the ground plane of the interconnect's electrically conductive substrate. The interconnect is a coaxial-like interconnect because the return lines are located around each signal line and thus shield each signal line from the other signal lines, much like the outer conductive shield of a coaxial cable.
    Type: Grant
    Filed: July 25, 2014
    Date of Patent: November 24, 2015
    Assignee: HGST Netherlands B.V.
    Inventors: John Contreras, Albert John Wallash, Rehan Ahmed Zakai
  • Patent number: 9117469
    Abstract: A “split-substrate” design is described for the metal ground layer in the suspension for a slider for use in a disk drive that reduces crosstalk from signals being transmitted on the conductive traces and allows externally induced interference to be shunted away from sensitive traces along selected portions of the suspension. In embodiments of the invention a slit formed in the metal ground layer to provide two parallel ground paths respectively on the left and right sides of the selected portion of the suspension. By positioning interference signal generating traces like writer traces on one side of the slit, that side becomes the noisy ground path leaving the other side as a “quiet” ground path. The shape, positioning and grounding of the split substrate structure can shunt return/ground currents created by external RFI into the noisy leg and thereby shield the quiet leg.
    Type: Grant
    Filed: December 1, 2014
    Date of Patent: August 25, 2015
    Assignee: HGST Netherlands B.V.
    Inventors: John Contreras, Albert John Wallash, Rehan Ahmed Zakai
  • Patent number: 9111561
    Abstract: A disk drive dynamic wave shaper (DWS) write driver includes a write current generator that produces a baseline output current for the write current pulses and an overshoot current generator that produces an overshoot current with different values. The overshoot current is added to the baseline current, with the value of the overshoot current amplitude (OSA) being selected in response to the frequency of transitions in the write data signal. The write driver includes logic circuitry that detects the pattern of transitions. Transitions that are immediately followed by a transition will receive a larger-than-nominal OSA1, transitions that are not immediately followed by a transition and that are not preceded by a long sequence of non-transitions will receive a nominal OSA2, and transitions after longer sequences of non-transitions will receive a smaller-than-nominal OSA3.
    Type: Grant
    Filed: October 28, 2014
    Date of Patent: August 18, 2015
    Assignee: HGST Netherlands B.V.
    Inventors: John Contreras, Samir Y. Garzon, Weldon Mark Hanson, Rehan Ahmed Zakai
  • Patent number: 9099128
    Abstract: A method, apparatus, and system are provided for implementing noise based detection of spin-torque oscillator (STO) power on for microwave assisted magnetic recording (MAMR) hard disk drives (HDDs). A low frequency noise generated by a spin-torque oscillator, such as noise in a frequency range between 10 kHz and 100 MHz, is detected. The detected STO noise is compared to a predefined threshold to identify STO power on operation.
    Type: Grant
    Filed: October 28, 2014
    Date of Patent: August 4, 2015
    Assignee: HGST Netherlands BV
    Inventors: John Contreras, Samir Y. Garzon, Rehan Ahmed Zakai
  • Patent number: 9001444
    Abstract: A method, apparatus, and system are provided for implementing a power-on spin-torque oscillator (STO) oscillation checker to monitor STO resistance to identify STO oscillation with microwave assisted magnetic recording (MAMR) hard disk drives (HDDs). An amplitude modulated write coil drive current is applied to the write coil in the presence of a DC bias current applied to the STO. The amplitude modulated write coil drive current modulates the STO resistance monitored using an amplifier circuit to identify STO oscillation, used to ensure stable MAMR HDD write operation.
    Type: Grant
    Filed: June 26, 2014
    Date of Patent: April 7, 2015
    Assignee: HGST Netherlands B.V.
    Inventors: John Contreras, Samir Y. Garzon, Rehan Ahmed Zakai
  • Patent number: 8988829
    Abstract: Disk drive embodiments with common lead connections in the slider, suspension, and preamplifier are described. The arm electronics IC includes a preamplifier with single-ended input from the set of signal traces that include a common signal return lead for the plurality of read transducers (readers) in the slider. Two embodiments of the preamps are described that include a single-ended design and a pseudo-single-ended design. Each embodiment supplies the required bias to each read transducer using an operational transconductance amplifier (OTA) that drives a variable current source connected to the transducer. The positive input to the OTA is a DC voltage with the AC signal from the transducer imposed on it. The negative input is a DC reference voltage. Various embodiments of the signal trace configuration on the suspension are described including a single and double layer embodiments.
    Type: Grant
    Filed: September 18, 2014
    Date of Patent: March 24, 2015
    Assignee: HGST Netherlands B.V.
    Inventors: John Contreras, Joey Martin Poss, Rehan Ahmed Zakai
  • Publication number: 20150077879
    Abstract: Disk drive embodiments with common lead connections in the slider, suspension, and preamplifier are described. The arm electronics IC includes a preamplifier with single-ended input from the set of signal traces that include a common signal return lead for the plurality of read transducers (readers) in the slider. Two embodiments of the preamps are described that include a single-ended design and a pseudo-single-ended design. Each embodiment supplies the required bias to each read transducer using an operational transconductance amplifier (OTA) that drives a variable current source connected to the transducer. The positive input to the OTA is a DC voltage with the AC signal from the transducer imposed on it. The negative input is a DC reference voltage. Various embodiments of the signal trace configuration on the suspension are described including a single and double layer embodiments.
    Type: Application
    Filed: September 18, 2014
    Publication date: March 19, 2015
    Inventors: John Contreras, Joey Martin Poss, Rehan Ahmed Zakai
  • Patent number: 8917465
    Abstract: A method, apparatus, and system are provided for implementing a power-on spin-torque oscillator (STO) oscillation checker to monitor STO resistance to identify STO oscillation with microwave assisted magnetic recording (MAMR) hard disk drives (HDDs). A changing bias current is applied to the STO in the presence of constant write drive current. The STO bias current is changed to observe sudden changes in STO resistance monitored using a differentiator circuit to identify STO oscillation, used to ensure stable MAMR HDD write operation.
    Type: Grant
    Filed: June 26, 2014
    Date of Patent: December 23, 2014
    Assignee: HGST Netherlands B.V.
    Inventors: John Contreras, Samir Y. Garzon, Ikuya Tagawa, Rehan Ahmed Zakai
  • Patent number: 8830614
    Abstract: Approaches for a hard-disk drive (HDD) having a balanced resistive temperature detector (RTD). A HDD includes a head slider comprising a single RTD. A read/write IC comprises a balance resistor having the same resistance as the single RTD when the head slider is not in physical contact with the disk. The same amount of current flows through the single RTD and the balance resistor except when the head slider is in physical contact with the disk. Detecting a voltage change across the single RTD enables physical contact between the head slider and the disk to be accurately detected using a circuit with low noise. Alternately, the head slider may include two RTDs connected in sequence, and the balance resistor may possess the same resistance as the two RTDs. The two RTDs may vary inversely with environmental changes to avoid the need to recalibrate the balance resistor after any environmental change.
    Type: Grant
    Filed: December 21, 2011
    Date of Patent: September 9, 2014
    Assignee: HGST Netherlands B.V.
    Inventors: Samir Y. Garzon, Rehan Ahmed Zakai, John Thomas Contreras
  • Patent number: 8804263
    Abstract: Embedded contact sensor controls for use in arm electronics (AE) in a disk drive are described that provide for removing undesirable offsets between the measured voltage across the ECS resistor in the slider and the balance resistor in ECS amplifier in the arm electronics (AE), which allows increased amplification of the resulting adjusted signal without saturation. Embodiments include a Zero-Offset Circuit, which can be activated periodically or on demand to sample and hold the present DC offset voltage in the ECS amplifier signal and subtract the DC offset voltage from ECS amplifier signal. The adjusted signal can then be further amplified without saturation.
    Type: Grant
    Filed: August 30, 2013
    Date of Patent: August 12, 2014
    Assignee: HGST Netherlands B.V.
    Inventors: John Contreras, Samir Y. Garzon, Rehan Ahmed Zakai
  • Patent number: 8654465
    Abstract: A method, apparatus, and system are provided for implementing spin-torque oscillator (STO) sensing with a demodulator for hard disk drives. The demodulator measures an instantaneous phase of the readback signal from a STO sensor and converts the readback signal into a signal that is proportional to the magnetic field affecting the STO frequency during a bit time. The converted signal is used for processing by conventional data detection electronics.
    Type: Grant
    Filed: December 9, 2011
    Date of Patent: February 18, 2014
    Assignee: HGST Netherlands B.V.
    Inventors: Patrick Mesquita Braganca, Richard Leo Galbraith, Bruce Alvin Gurney, Neil Smith, Bruce Wilson, Rehan Ahmed Zakai