Patents by Inventor Reiichi Kobayashi

Reiichi Kobayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4897725
    Abstract: A ghost canceling circuit comprising a Fourier transforming circuit for Fourier transforming a reference waveform contained in the received television signal while converting the analogue signal into digital form, a device for holding and outputting a reference waveform Fourier coefficient obtained by Fourier transforming the reference waveform contained in the television signal at the transmission side, a signal processing portion in which the outputted reference waveform Fourier coefficient is divided by the result of the A/D conversion, the divided Fourier coefficient is reverse Fourier transformed, and the reverse Fourier transformed Fourier coefficient is supplied to a transversal filter recognizing it as a tap gain.
    Type: Grant
    Filed: March 13, 1989
    Date of Patent: January 30, 1990
    Assignees: NEC Home Electronics Ltd., Nippon Hoso Kyokai
    Inventors: Tadaaki Tanaka, Fumiyoshi Sasaki, Tetsuro Miyazaki, Reiichi Kobayashi, Tatsuya Shiki, Michio Kobayashi
  • Patent number: 4799102
    Abstract: This invention provides a digital color demodulator having: a first phase locked loop circuit which generates an analog subcarrier signal phase locked to the color burst signal; a second phase locked loop circuit which generates an internal system clock signal phase locked to a horizontal period; a Y/C color separation circuit operating under the internal system clock signal; a pair of multiplying circuits, one of which multiplies a digital subcarrier signal, converted from the analog subcarrier signal, with the color signal, and the other of which multiplies the digital subcarrier signal, phase delayed by substantially 90.degree., with the color signal, thereby performing orthogonal demodulation of the signal.The digital processing circuits of this invention are all driven by the internal system clock signal generated by the second phase locked loop circuit.
    Type: Grant
    Filed: August 26, 1987
    Date of Patent: January 17, 1989
    Assignee: NEC Home Electronics Ltd.
    Inventor: Reiichi Kobayashi