Patents by Inventor Reiki Fujimori

Reiki Fujimori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11362209
    Abstract: In a general aspect, an apparatus, can include a trench disposed within a semiconductor region of a substrate. The trench can be lined with a gate dielectric and including an electrode disposed within the trench. The apparatus can include a polysilicon layer disposed above the trench. The trench can have an end portion disposed below an opening in the polysilicon layer. The end portion of the trench can be disposed between a first side of the opening and a second side of the opening.
    Type: Grant
    Filed: October 1, 2019
    Date of Patent: June 14, 2022
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Reiki Fujimori
  • Publication number: 20220130969
    Abstract: A power semiconductor device includes a semiconductor layer having a first conductivity type. An active region has a plurality of gate trenches. An interlayer dielectric (ILD) has a sloped region and a planar region. A metal contact hole has a sidewall aligned to the sloped region of the ILD. A metal contact is provided in the metal contact hole and couples the active region.
    Type: Application
    Filed: October 22, 2020
    Publication date: April 28, 2022
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Reiki FUJIMORI, Takashi HIROSHIMA
  • Publication number: 20200335624
    Abstract: In a general aspect, an apparatus, can include a trench disposed within a semiconductor region of a substrate. The trench can be lined with a gate dielectric and including an electrode disposed within the trench. The apparatus can include a polysilicon layer disposed above the trench. The trench can have an end portion disposed below an opening in the polysilicon layer. The end portion of the trench can be disposed between a first side of the opening and a second side of the opening.
    Type: Application
    Filed: October 1, 2019
    Publication date: October 22, 2020
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Reiki FUJIMORI
  • Patent number: 8461663
    Abstract: In a conventional semiconductor device, part of a dielectric film of a capacitive element is removed when photoresist is peeled off, and this causes problems of variation in capacitance value of the capacitive element and deterioration of breakdown voltage characteristics. In a semiconductor device according to the present invention, a silicon nitride film serving as a dielectric film is formed on the top face of a lower electrode of a capacitive element, and an upper electrode is formed on the top face of the silicon nitride film. The upper electrode is formed of a laminated structure having a silicon film and a polysilicon film protecting the silicon nitride film. This structure prevents part of the silicon nitride film from being removed when, for example, photoresist is peeled off, thereby preventing variation in capacitance value of the capacitive element and deterioration of the breakdown voltage characteristics.
    Type: Grant
    Filed: April 7, 2010
    Date of Patent: June 11, 2013
    Assignees: SANYO Electric Co., Ltd., SANYO Semiconductor Co., Ltd.
    Inventors: Reiki Fujimori, Mitsuru Soma
  • Publication number: 20100252910
    Abstract: In a conventional semiconductor device, part of a dielectric film of a capacitive element is removed when photoresist is peeled off, and this causes problems of variation in capacitance value of the capacitive element and deterioration of breakdown voltage characteristics. In a semiconductor device according to the present invention, a silicon nitride film serving as a dielectric film is formed on the top face of a lower electrode of a capacitive element, and an upper electrode is formed on the top face of the silicon nitride film. The upper electrode is formed of a laminated structure having a silicon film and a polysilicon film protecting the silicon nitride film. This structure prevents part of the silicon nitride film from being removed when, for example, photoresist is peeled off, thereby preventing variation in capacitance value of the capacitive element and deterioration of the breakdown voltage characteristics.
    Type: Application
    Filed: April 7, 2010
    Publication date: October 7, 2010
    Applicants: SANYO Electric Co., Ltd., SANYO Semiconductor Co., Ltd.
    Inventors: Reiki FUJIMORI, Mitsuru Soma
  • Publication number: 20060065950
    Abstract: A high performance semiconductor device including a silicon oxide film that surrounds an SiGe alloy layer, which functions as a base layer, and an n-type diffusion layer, which functions as an emitter layer. Under a polycrystalline silicon film, the silicon oxide film extends over a boundary between an active region and an element isolation film. After a flat interlayer dielectric is formed, a lead wire is connected to a silicide film located above the isolation film.
    Type: Application
    Filed: September 30, 2005
    Publication date: March 30, 2006
    Inventors: Tatsuhiko Koide, Yoshikazu Ibara, Koichi Saito, Daichi Suma, Reiki Fujimori