Abstract: A memory device includes first electrode layers stacked in a first direction, a first semiconductor layer piercing the first electrode layers in a first direction, a first insulating film surrounding the first semiconductor layer, and a semiconductor base connected to the first semiconductor layer. The first insulating film includes a first film, a second film, and a third film provided in order in a second direction from the first semiconductor layer toward one of first electrode layers. Spacing in the first direction between the second film and the semiconductor base is wider than a film thickness of the third film in the second direction. A minimum width of an outer perimeter of the first semiconductor layer is substantially the same as a width of an outer perimeter at a portion of the first semiconductor layer piercing the most proximal first electrode layer.

Abstract: This insulated wire includes an insulating coating formed on a surface of a conductive wire body, and a soldered portion for electric conduction. The soldered portion is formed by attaching dicarboxylic acid onto a surface of the insulating coating, and by performing solder plating in a state where the dicarboxylic acid is attached onto the surface of the insulating coating. In addition, this method for manufacturing an insulated wire includes a surface treatment step of attaching the dicarboxylic acid onto a surface of an insulating coating which becomes the soldered portion, and a soldering step of performing the solder plating by immersing the surface treated portion of the insulating coating in a heated solder melt.

Abstract: A memory device includes first electrode layers stacked in a first direction, a first semiconductor layer piercing the first electrode layers in a first direction, a first insulating film surrounding the first semiconductor layer, and a semiconductor base connected to the first semiconductor layer. The first insulating film includes a first film, a second film, and a third film provided in order in a second direction from the first semiconductor layer toward one of first electrode layers. Spacing in the first direction between the second film and the semiconductor base is wider than a film thickness of the third film in the second direction. A minimum width of an outer perimeter of the first semiconductor layer is substantially the same as a width of an outer perimeter at a portion of the first semiconductor layer piercing the most proximal first electrode layer.

Abstract: According to one embodiment, a semiconductor memory includes includes conductors, a pillar through the conductors, a controller. The pillar includes a first pillar portion, a second pillar portion, and a joint portion between the first pillar portion and the second pillar portion. Each of the portions where the pillar and the conductors cross functions as a transistor. Among the conductors through the first pillar portion, the conductor most proximal to the joint portion and one of the other conductors respectively function as a first dummy word line and a first word line. Among the conductors through the second pillar portion, the conductor most proximal to the joint portion and one of the other conductors respectively function as a second dummy word line and a second word line.

Abstract: A memory device includes first electrode layers stacked in a first direction, a first semiconductor layer piercing the first electrode layers in a first direction, a first insulating film surrounding the first semiconductor layer, and a semiconductor base connected to the first semiconductor layer. The first insulating film includes a first film, a second film, and a third film provided in order in a second direction from the first semiconductor layer toward one of first electrode layers. Spacing in the first direction between the second film and the semiconductor base is wider than a film thickness of the third film in the second direction. A minimum width of an outer perimeter of the first semiconductor layer is substantially the same as a width of an outer perimeter at a portion of the first semiconductor layer piercing the most proximal first electrode layer.

Abstract: The present invention provides an insulated wire having a heat-resistant insulating layer, wherein heat-resistant particles are contained in the insulating layer, and the heat-resistant particles are densely dispersed in a surface region of the insulating layer. For example, the concentration of heat-resistant particles included in a layer thick portion of 0.5 ?m from the surface of the insulating layer is two times the concentration of heat-resistant particles included in a central portion of the insulating layer. An electrodeposition liquid used to form the insulating layer is formed by dispersing the heat-resistant particles in a suspension in which resin particles are dispersed, the viscosity is 100 cP or less, and the turbidity is 1 mg/L or more.

Abstract: According to one embodiment, the stacked body includes a first stacked portion including a plurality of electrode layers, a second stacked portion including a plurality of electrode layers, and being disposed separately from the first stacked portion in the first direction, and a connection portion including a high dielectric layer provided between the first stacked portion and the second stacked portion and having a dielectric constant higher than a dielectric constant of the insulator. The column-shaped portion includes a first portion provided in the first stacked portion and extending in the first direction of the stacked body, a second portion provided in the second stacked portion and extending in the first direction, and an intermediate portion provided in the connection portion and connected the first portion to the second portion.

Abstract: According to one embodiment, a semiconductor memory includes includes conductors, a pillar through the conductors, a controller. The pillar includes a first pillar portion, a second pillar portion, and a joint portion between the first pillar portion and the second pillar portion. Each of the portions where the pillar and the conductors cross functions as a transistor. Among the conductors through the first pillar portion, the conductor most proximal to the joint portion and one of the other conductors respectively function as a first dummy word line and a first word line. Among the conductors through the second pillar portion, the conductor most proximal to the joint portion and one of the other conductors respectively function as a second dummy word line and a second word line.

Abstract: The present invention provides an insulated wire having a heat-resistant insulating layer, wherein heat-resistant particles are contained in the insulating layer, and the heat-resistant particles are densely dispersed in a surface region of the insulating layer. For example, the concentration of heat-resistant particles included in a layer thick portion of 0.5 ?m from the surface of the insulating layer is two times the concentration of heat-resistant particles included in a central portion of the insulating layer. An electrodeposition liquid used to form the insulating layer is formed by dispersing the heat-resistant particles in a suspension in which resin particles are dispersed, the viscosity is 100 cP or less, and the turbidity is 1 mg/L or more.

Abstract: This insulated wire includes an insulating coating formed on a surface of a conductive wire body, and a soldered portion for electric conduction. The soldered portion is formed by attaching dicarboxylic acid onto a surface of the insulating coating, and by performing solder plating in a state where the dicarboxylic acid is attached onto the surface of the insulating coating. In addition, this method for manufacturing an insulated wire includes a surface treatment step of attaching the dicarboxylic acid onto a surface of an insulating coating which becomes the soldered portion, and a soldering step of performing the solder plating by immersing the surface treated portion of the insulating coating in a heated solder melt.

Abstract: A light emitting element having a light emitting layer, an electro-conductive reflection film that reflects light emitted from the light emitting layer and a substrate in this order, wherein the electro-conductive reflection film contains metal nanoparticles.

Abstract: A light emitting element having a light emitting layer, an electro-conductive reflection film that reflects light emitted from the light emitting layer and a substrate in this order, wherein the electro-conductive reflection film contains metal nanoparticles.

Abstract: This composition for an antireflective film includes a translucent binder, wherein the translucent binder contains either one or both of a polymer type binder and a non-polymer type binder, a content of the translucent binder is in a range of 10 parts by mass to 90 parts by mass with respect to 100 parts by mass of a total amount of components other than a dispersion medium, and a refractive index of an antireflective film which is formed by curing the composition for an antireflective film is in a range of 1.70 to 1.90. This method for manufacturing an antireflective film includes: applying the above-described composition for an antireflective film onto a transparent conductive film by a wet coating method to form an antireflective coating film; and curing the antireflective coating film to form an antireflective film.

Abstract: Porous titanium having a low contact resistance includes porous titanium body, Au, and Ti oxide layer (3). Porous titanium includes continuous holes (1) opening on a surface and being connected to inner holes and a skeleton (2). Au adheres to at least an outer skeletal surface (4) of the porous titanium via diffusion bonding to form a network structure. The Ti oxide layer (3) is formed in a clearance between adjacent Au cords (5) of the Au network sticking. The width of an Au cord (5) of the Au network is 0.3 to 10 ?m at least at one position; and the thickness of the Ti oxide layer (3), which is formed in the clearance between adjacent Au cords (5) of the Au network is 30 to 150 nm.

Abstract: Porous titanium having a low contact resistance includes porous titanium body, Au, and a Ti oxide layer (3). Porous titanium includes continuous holes (1) opening on a surface and being connected to inner holes and a skeleton (2). Au adheres to at least an outer skeletal surface (4) of the porous titanium via diffusion bonding to form a network structure. The Ti oxide layer (3) is formed in a clearance between adjacent Au codes (5) of the Au network sticking. The width of an Au code (5) of the Au network is 0.3 to 10 ?m at least at one position; and the thickness of the Ti oxide layer (3), which is formed in the clearance between adjacent Au codes (5) of the Au network is 30 to 150 nm.

Abstract: A regulator for regulating physiological functions, such as activity of increasing an intracellular calcium ion concentration, activity of promoting growth hormone secretion, activity of promoting eating, regulatory activity relating to fat accumulation, activity of ameliorating heart function and activity of stimulating gastric acid secretion, of ghrelin, which regulator comprises a fatty acid of carbon number 2-35 or its derivative, and use thereof.

Abstract: A pharmaceutical composition for treating periodontal diseases which comprises one or more of therapeutically active ingredients dispersed in a carrier, characterized in that said carrier consists of(A) water soluble polymer, and(B) polymeric particles having a limited solubility in water,said particles being dispersed in said water soluble polymer.

Abstract: A pharmaceutical composition useful for treatment of periodontal diseases which comprises one or more active ingredients effective for the treatment of periodontal diseases, characterized in that said active ingredient or ingredients are dispersed in collagen.