Patents by Inventor Reimar Gisbert Döffinger
Reimar Gisbert Döffinger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Method of and apparatus for generating a signature representative of the content of an array of data
Patent number: 10832639Abstract: A method and an apparatus for generating a signature representative of the content of a region of an array of data in a data processing system, where the region of the array of data comprising plural data positions, and each data position having an associated data value or values. A data value or values for a data position of the region of the data array is/are generated. The data value or values for the data position of the region of the data array is/are written to storage that stores the region of the data array as it is being generated. A signature representative of the content of the region of the data array is generated in parallel with the data value or values for the data position of the region of the data array being written to the storage.Type: GrantFiled: July 20, 2016Date of Patent: November 10, 2020Assignee: ARM LimitedInventors: Toni Viki Brkic, Jakob Axel Fries, Reimar Gisbert Döffinger -
Patent number: 10791332Abstract: The technology described herein facilitates parallel encoding of two groups of blocks of data of a sequence of blocks of data, whilst also facilitating the use of dependent encoding across the sequence of data blocks. This is achieved by allocating pairs of first and second groups of data blocks to separate encoding units, and determining an encoding parameter value to be used for encoding the first block of each second group of data blocks. For correct reconstruction of the image, it is ensured that a block belonging to the first group of data blocks of a pair of groups of data blocks is encoded with an encoding parameter value that will cause a decoder to use the determined encoding parameter value when decoding the first block of the second group.Type: GrantFiled: November 23, 2015Date of Patent: September 29, 2020Assignee: Arm LimitedInventors: Reimar Gisbert Döffinger, Thomas Nyberg
-
Patent number: 10789768Abstract: A graphics processing apparatus comprises fragment generating circuitry to generate graphics fragments corresponding to graphics primitives, thread processing circuitry to perform threads of processing corresponding to the fragments, and forward kill circuitry to trigger a forward kill operation to prevent further processing of a target thread of processing corresponding to an earlier graphics fragment when the forward kill operation is enabled for the target thread and the earlier graphics fragment is determined to be obscured by one or more later graphics fragments. The thread processing circuitry supports enabling of the forward kill operation for a thread including at least one forward kill blocking instruction having a property indicative that the forward kill operation should be disabled for the given thread, when the thread processing circuitry has not yet reached a portion of the thread including the at least one forward kill blocking instruction.Type: GrantFiled: September 12, 2018Date of Patent: September 29, 2020Assignee: ARM LimitedInventors: Stephane Forey, Jørn Nystad, Reimar Gisbert Döffinger, Kenneth Edvard Østby, Toni Viki Brkic
-
Patent number: 10748236Abstract: A warp processing unit controls, in dependence on a warp program counter shared between a plurality of threads processing respective graphics fragments, fetching of a next instruction to be executed for at least some of the plurality of threads. In response to a determination that a given subset of threads is to be discarded when at least one other subset of threads is to continue, the warp processing unit processes the given subset of threads in a discarded state. For a thread processed in the discarded state, execution of instructions continues for the discarded thread, and at least one of: generation of data access messages triggered by the discarded thread is suppressed; and at least one processing operation, which would be deferred until completion of the discarded thread had the thread not been discarded, is enabled to be commenced independently of an outcome of the discarded thread.Type: GrantFiled: August 30, 2018Date of Patent: August 18, 2020Assignee: ARM LimitedInventors: Stephane Forey, Isidoros Sideris, Reimar Gisbert Döffinger
-
Patent number: 10311016Abstract: A graphics processing pipeline includes a rasteriser, an early culling tester, a renderer, a late culling tester, and a culling test data buffer that stores data values for use by the early and late culling testers. The testing of fragments by the early and late culling testers is controlled in accordance with a first set of state information indicative of when a culling test operation to be used to determine whether to cull the fragments is to be performed, and a second set of state information indicative of when to determine whether to update the culling test data buffer with data for the fragments based on a culling test operation, allocated to the fragments.Type: GrantFiled: May 30, 2017Date of Patent: June 4, 2019Assignee: Arm LimitedInventors: Frode Heggelund, Toni Viki Brkic, Reimar Gisbert Döffinger
-
Publication number: 20190087928Abstract: A warp processing unit controls, in dependence on a warp program counter shared between a plurality of threads processing respective graphics fragments, fetching of a next instruction to be executed for at least some of the plurality of threads. In response to a determination that a given subset of threads is to be discarded when at least one other subset of threads is to continue, the warp processing unit processes the given subset of threads in a discarded state. For a thread processed in the discarded state, execution of instructions continues for the discarded thread, and at least one of: generation of data access messages triggered by the discarded thread is suppressed; and at least one processing operation, which would be deferred until completion of the discarded thread had the thread not been discarded, is enabled to be commenced independently of an outcome of the discarded thread.Type: ApplicationFiled: August 30, 2018Publication date: March 21, 2019Inventors: Stephane FOREY, Isidoros SIDERIS, Reimar Gisbert DÖFFINGER
-
Publication number: 20190088009Abstract: A graphics processing apparatus comprises fragment generating circuitry to generate graphics fragments corresponding to graphics primitives, thread processing circuitry to perform threads of processing corresponding to the fragments, and forward kill circuitry to trigger a forward kill operation to prevent further processing of a target thread of processing corresponding to an earlier graphics fragment when the forward kill operation is enabled for the target thread and the earlier graphics fragment is determined to be obscured by one or more later graphics fragments. The thread processing circuitry supports enabling of the forward kill operation for a thread including at least one forward kill blocking instruction having a property indicative that the forward kill operation should be disabled for the given thread, when the thread processing circuitry has not yet reached a portion of the thread including the at least one forward kill blocking instruction.Type: ApplicationFiled: September 12, 2018Publication date: March 21, 2019Inventors: Stephane FOREY, Jørn NYSTAD, Reimar Gisbert DÖFFINGER, Kenneth Edvard ØSTBY, Toni Viki BRKIC
-
Publication number: 20180349315Abstract: A graphics processing pipeline includes a rasteriser, an early culling tester, a renderer, a late culling tester, and a culling test data buffer that stores data values for use by the early and late culling testers. The testing of fragments by the early and late culling testers is controlled in accordance with a first set of state information indicative of when a culling test operation to be used to determine whether to cull the fragments is to be performed, and a second set of state information indicative of when to determine whether to update the culling test data buffer with data for the fragments based on a culling test operation, allocated to the fragments.Type: ApplicationFiled: May 30, 2017Publication date: December 6, 2018Applicant: ARM LimitedInventors: Frode Heggelund, Toni Viki Brkic, Reimar Gisbert Döffinger
-
METHOD OF AND APPARATUS FOR GENERATING A SIGNATURE REPRESENTATIVE OF THE CONTENT OF AN ARRAY OF DATA
Publication number: 20170024158Abstract: A method and an apparatus for generating a signature representative of the content of a region of an array of data in a data processing system, where the region of the array of data comprising plural data positions, and each data position having an associated data value or values. A data value or values for a data position of the region of the data array is/are generated. The data value or values for the data position of the region of the data array is/are written to storage that stores the region of the data array as it is being generated. A signature representative of the content of the region of the data array is generated in parallel with the data value or values for the data position of the region of the data array being written to the storage.Type: ApplicationFiled: July 20, 2016Publication date: January 26, 2017Inventors: Toni Viki BRKIC, Jakob Axel FRIES, Reimar Gisbert DÖFFINGER -
Patent number: 9454844Abstract: An apparatus for processing graphics primitives for display includes rasterization, depth testing, and rendering circuitry. The depth testing circuitry determines if a selected graphics fragment would be obscured when displayed by comparing a depth comparison function and a depth value associated with the selected graphics fragment with a stored depth value. The depth testing circuitry suppresses rendering operations for the fragment if the selected fragment would be obscured. An update indication shows a possible change direction due to the updating for a stored depth value which depends on a received depth comparison function. The depth testing for the selected fragment is performed using the possible change direction shown by the update indication to modify the depth comparison function to allow for updating of the stored depth value by the rendering operations.Type: GrantFiled: October 2, 2014Date of Patent: September 27, 2016Assignee: ARM LimitedInventor: Reimar Gisbert Döffinger
-
Publication number: 20160191937Abstract: The technology described herein facilitates parallel encoding of two groups of blocks of data of a sequence of blocks of data, whilst also facilitating the use of dependent encoding across the sequence of data blocks. This is achieved by allocating pairs of first and second groups of data blocks to separate encoding units, and determining an encoding parameter value to be used for encoding the first block of each second group of data blocks. For correct reconstruction of the image, it is ensured that a block belonging to the first group of data blocks of a pair of groups of data blocks is encoded with an encoding parameter value that will cause a decoder to use the determined encoding parameter value when decoding the first block of the second group.Type: ApplicationFiled: November 23, 2015Publication date: June 30, 2016Applicant: ARM LimitedInventors: Reimar Gisbert Döffinger, Thomas Nyberg
-
Patent number: 8331703Abstract: An image encoding apparatus is configured to encode image data comprising a sequence of unencoded blocks of pixels into a sequence of encoded blocks of pixels in a predetermined image encoding format. Each encoded block of pixels has a characteristic encoding value representative of its corresponding unencoded block of pixels, and a plurality of dependently encoded blocks of pixels each have a dependent characteristic encoding value which is defined with reference to the characteristic encoding value for a preceding encoded block of pixels.Type: GrantFiled: February 18, 2011Date of Patent: December 11, 2012Assignee: ARM LimitedInventors: Lars Ingvar Malmborg, Reimar Gisbert Döffinger
-
Publication number: 20120213448Abstract: An image encoding apparatus is configured to encode image data comprising a sequence of unencoded blocks of pixels into a sequence of encoded blocks of pixels in a predetermined image encoding format. Each encoded block of pixels has a characteristic encoding value representative of its corresponding unencoded block of pixels, and a plurality of dependently encoded blocks of pixels each have a dependent characteristic encoding value which is defined with reference to the characteristic encoding value for a preceding encoded block of pixels.Type: ApplicationFiled: February 18, 2011Publication date: August 23, 2012Applicant: ARM LIMITEDInventors: Lars Ingvar Malmborg, Reimar Gisbert Döffinger