Abstract: In a digital switching center for a telephone switching system or the like, a clock signal distribution arrangement having a redundant central clock generator supplying clock signals to the switching matrices the arrangement including electro-optical transducers, brancher modules, light conductors and opto-electrical transducers connected in signal distribution paths between the clock generator and the switching matrices. The distribution paths are doubled for redundancy purposes.

Abstract: A time slot multiplex device for a time division multiplex system having a voice memory for storing data words received on an input multiplex line, and a control memory for controlling the reading of said voice memory to an output multiplex line, incorporates logic circuitry for generating a plurality of associated pairs of addresses, one for said control memory and one for said voice memory, corresponding to a plurality of equally spaced time slots for a multi-channel connection to said output multiplex line of relatively high band width, in response to a single pair of associated addresses furnished by a higher ranking control means and a logic circuit which, in association with a time slot counter, generates the required addresses during cycling of the time slot counter through a single frame of the time division multiplex system.

Abstract: In a time-division multiplex switching network unit for time-space switching which operates employing an information memory which has information input thereto in a cyclic manner and read therefrom in a random fashion, the number of terminals is limited, in particular, by the fact that during random output it is not possible to exceed a specific speed. Higher number of terminals are achieved in that the switching network units are composed of modules whose corresponding inputs are connected to one another and into which, during each pulse frame, more PCM words are input than are output. In this manner, the reading frequency is kept low, although, because of the multiple connection at the input end, blocking-free switch-through is provided.

Abstract: In switching network units which operate employing an information memory featuring cyclic input and random reading, the number of connections is particularly limited by the fact that during random reading it is not possible to exceed a specific speed. They are normally designed in such a manner that, to a full extent, they can effect both time-wise switching and spatial switching. In these units, the speed restriction during random reading means that the number of connections normally cannot exceed a certain value. Moreover, the facility of time channel conversion to a full extent in units of central switching stages represents an unnecessary expense. Such units are therefore constructed from a plurality of identical modules whose equivalent inputs are connected to one another and into which, during each pulse frame, more PCM words are input than PCM words are stored therein or can be read in random therefrom.

Abstract: In a time-division multiplex digital switching system as for example for PCM telephone exchange utilizing duplicate field installations, the exchange clock pulse generating arrangement is provided in duplicate for the purpose of clock pulse or frequency supply of said coupling field installations, and one arrangement is phase synchronized by the other master frequency determining unit and one exchange clock pulse generating portion supplies one coupling field half in each instance, and the other supplies the other half. The functions of the exchange clock pulse generating portions can be entirely or completely interchanged, as for example, when faults or failures appear in certain portions of the equipment.

Abstract: A method and apparatus for synchronizing clock oscillators in each of the exchange installations (network nodes) of a PCM/TDM telecommunication network is described. A frequency divider in each network node receives pulses from a clock generator at that node, and frequency dividers are provided for receiving clock pulses from other exchangers on incoming trunks. The incoming trunk frequency dividers are caused to operate with a phase displacement of 180.degree. relative to the clock generator in the exchange. The outputs from the incoming trunk frequency dividers and the exchange clock frequency divider are coupled to phase discriminators. The phase discriminator outputs are coupled through a sum or mean value producing element to produce a control signal for adjusting the frequency of the exchange clock oscillator. Reference phase regeneration is initiated as a result of frequency drift from the oscillator no-load frequency, which drift exceeds a predetermined value.