Abstract: Configuration for temperature treatment of substrates, in particular semiconductor crystal wafers, comprised of a carrier for receiving the substrates to be treated, a frame-like support for receiving the carrier, whereby the frame-like support is connected to a time-controlled compressed air cylinder and can be shifted in axial direction by means of a roller guide, as well as heating devices. The heating devices are connected to a vacuum suction configuration, and includes one, disk-shaped heating plate with a flute type opening on top, to which the substrates contained in carrier are vacuum sucked. The configuration is used for low temperature processes used in conjunction with semiconductor technology, especially photolithographic processes, and eliminates unnecessary reloading or other rearranging procedures.

Abstract: A method of manufacturing stable, low resistance contacts in an integrated semiconductor circuit which involves providing highly doped impurity diffused regions in a silicon substrate, forming a silicon dioxide layer over the highly doped diffused regions and the surrounding substrate, forming contact holes of uniform size in the silicon dioxide layer in selected areas of the highly doped diffused regions, applying a layer including a metal silicide into the holes in contact with the underlying highly doped diffused regions, applying an n.sup.+ -doped polysilicon layer into the contact holes and over the silicon dioxide layer with a thickness corresponding to about half the contact hole side length, and then depositing a layer of predominantly aluminum over the n.sup.+ -doped polysilicon layer.

Abstract: Structures composed of photosensitive resist are produced for semiconductor circuits by first generating a mask of a photosensitive resist onto a substrate and then applying a layer of a photosensitive resist over the entire surface of the substrate, including the first generated mask, so that such mask dissociates or dissolves by the material of the subsequently applied layer, which is then structured. In this manner, an improved adhesion of the resist structures to the substrate is achieved and simultaneously cleansing steps are eliminated. The inventive process is utilized for all processes during manufacture of semiconductor circuits wherein at least two photolithographic processes occur without the intervention of a high temperature step.

Abstract: A one-transistor storage element system and a method for producing the same is disclosed wherein each storage element has a sselector field effect transistor and a storage capacitor. A doped semiconductor layer is provided having an oppositely doped bit line provided at a surface thereof, an oppositely doped source zone connecting to the bit line by an oppositely doped connecting zone, and an oppositely doped drain zone also provided at a surface of the semiconductor layer. An insulating layer is provided over the surface of the semiconductor layer and an electrically conductive coating is provided thereon. A first separate part of the conductive coating forms a word line which is positioned over a gap between the source and drain zones. Portions of the word line form a gate beneath which a channel of the transistor is formed.

Abstract: A semiconductor storage element is disclosed having a storage capacitor whose storage electrode is arranged above a doped semiconductor layer. The storage electrode is formed of a portion of a strip-like reference potential line which is separated from the semiconductor layer by a thin insulating layer. A transfer gate is also provided adjacent to the storage electrode which is formed from a portion of a strip-like word line likewise separated from the semiconductor layer by a thinner insulating layer. An oppositely doped zone is arranged at a surface of the semiconductor layer and serves as a bit line. The word line and the reference potential line run parallel to one another and are arranged directly adjacent to one another. When a potential is connected to the transfer gate, the bit line doped zone may be selectively conductively connected to the storage zone. The reference potential line for one group of the storage elements can be also used as a word line for another group of the storage elements.

Abstract: Described are novel semiconductor structures having a protective passivating layer made from photo- or radiation cross-linking of selected reactive sites of a soluble pre-polymer which is a poly-addition or poly-condensation product of a polyfunctional carbocyclic and/or heterocyclic compound having reactive groups for condensation or addition as well as photoreactive or radiation-reactive groups capable of further polymerization or dimerization. Selected non-cross-linked portions of the passivating layer may be removed by dissolution to form contact points for various useful semiconductor and capacitor components.