Patents by Inventor Reiner Trinowitz

Reiner Trinowitz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Mark configuration, wafer with at least one mark configuration, and a method of producing at least one mark configuration
    Patent number: 6982495
    Abstract: A mark configuration for the alignment and/or determination of a relative position of at least two planes in relation to one another in a substrate and/or in layers on a substrate during lithographic exposure, in particular, in the case of a wafer during the production of DRAMs, includes a mark structure, and at least one layer of a definable thickness underneath the mark structure for adjusting the physical position of the mark structure relative to a reference plane in or on the substrate. Also provided is a wafer having such a configuration and a process for providing such a configuration. The invention allows a mark configuration to have mark structures exhibiting good contrast regardless of the design or the process conditions.
    Type: Grant
    Filed: October 31, 2002
    Date of Patent: January 3, 2006
    Assignee: Infineon Technologies AG
    Inventors: Hans-Georg Fröhlich, Johannes Kowalewski, Udo Götschkes, Frank Hübinger, Gerd Krause, Heike Langnickel, Antje Lässig, Reiner Trinowitz
  • Mark configuration, wafer with at least one mark configuration, and a method of producing at least one mark configuration
    Publication number: 20030092204
    Abstract: A mark configuration for the alignment and/or determination of a relative position of at least two planes in relation to one another in a substrate and/or in layers on a substrate during lithographic exposure, in particular, in the case of a wafer during the production of DRAMs, includes a mark structure, and at least one layer of a definable thickness underneath the mark structure for adjusting the physical position of the mark structure relative to a reference plane in or on the substrate. Also provided is a wafer having such a configuration and a process for providing such a configuration. The invention allows a mark configuration to have mark structures exhibiting good contrast regardless of the design or the process conditions.
    Type: Application
    Filed: October 31, 2002
    Publication date: May 15, 2003
    Inventors: Hans-Georg Frohlich, Johannes Kowalewski, Udo Gotschkes, Frank Hubinger, Gerd Krause, Heike Langnickel, Antje Lassig, Reiner Trinowitz