Patents by Inventor Reiner Welk

Reiner Welk has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230129973
    Abstract: In an embodiment, a radio frequency (RF) receiver circuit includes a main circuit and a wake-up circuit. The main circuit is configured to process RF signals. The wake-up circuit is configured to detect a reception of the RF signals. The wake-up circuit includes an automatic gain control (AGC) loop, and is configured to have a first operating mode where a set point voltage of the loop has a first substantially constant value, and a second operating mode where the set point voltage of the loop has a second value dependent on a power supply voltage of the wake-up circuit.
    Type: Application
    Filed: September 7, 2022
    Publication date: April 27, 2023
    Inventors: Reiner Welk, Danika Perrin
  • Publication number: 20230018356
    Abstract: In an embodiment an amplifier includes a first MOS transistor having a drain connected to an output of the amplifier and a source coupled to a first node configured to receive a first power supply potential, a first capacitive element connected between an input of the amplifier and a gate of the first MOS transistor, a first current source connecting the drain of the first MOS transistor to a second node configured to receive a second power supply potential and a resistive element and a second capacitive element connected in parallel between the gate and the drain of the first MOS transistor, the resistive element including a switched capacitor.
    Type: Application
    Filed: July 12, 2022
    Publication date: January 19, 2023
    Inventors: Hugo Gicquel, Sandrine Nicolas, Cedric Rechatin, Reiner Welk
  • Patent number: 10979063
    Abstract: An electronic circuit comprises capacitive structures that are connected to one or a plurality of nodes, where each of the capacitive structures is formed by a capacitor or by a plurality of capacitors electrically connected in parallel. The electronic circuit further comprises additional capacitors that are each connected to the one or plurality of nodes. For at least one distance between capacitors, the capacitive structures have a same average of values defined, for each capacitor of each capacitive structure, by the number of capacitors of the circuit connected to the one or plurality of nodes and located at the distance from the capacitor of the capacitive structure.
    Type: Grant
    Filed: April 29, 2020
    Date of Patent: April 13, 2021
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventors: Sandrine Nicolas, Damien Giot, Serge Ramet, Reiner Welk
  • Publication number: 20200366308
    Abstract: An electronic circuit comprises capacitive structures that are connected to one or a plurality of nodes, where each of the capacitive structures is formed by a capacitor or by a plurality of capacitors electrically connected in parallel. The electronic circuit further comprises additional capacitors that are each connected to the one or plurality of nodes. For at least one distance between capacitors, the capacitive structures have a same average of values defined, for each capacitor of each capacitive structure, by the number of capacitors of the circuit connected to the one or plurality of nodes and located at the distance from the capacitor of the capacitive structure.
    Type: Application
    Filed: April 29, 2020
    Publication date: November 19, 2020
    Inventors: Sandrine Nicolas, Damien Giot, Serge Ramet, Reiner Welk