Patents by Inventor Rekha Chithra Thomas

Rekha Chithra Thomas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Memory device decoder configurations
    Patent number: 11848048
    Abstract: Methods, systems, and devices for memory device decoder configurations are described. A memory device may include an array of memory cells and decoder circuits. The array may include one or more memory cells coupled with an access line, and a decoder circuit may be configured to bias the access line to one or more voltages. The decoder circuit may include a first transistor coupled with the access line and a second transistor coupled with the access line. The first transistor may be a planar transistor having a first gate electrode formed on a substrate, and the second transistor may be a trench transistor having a second gate electrode that extends into a cavity of the substrate, where a length of a first gate electrode may be greater than a length of the second gate electrode.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: December 19, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Ahmed Nayaz Noemaun, Chandra S. Danana, Durga P. Panda, Luca Laurin, Michael J. Irwin, Rekha Chithra Thomas, Sara Vigano, Stephen W. Russell, Zia A. Shafi
  • MEMORY DEVICE DECODER CONFIGURATIONS
    Publication number: 20230170015
    Abstract: Methods, systems, and devices for memory device decoder configurations are described. A memory device may include an array of memory cells and decoder circuits. The array may include one or more memory cells coupled with an access line, and a decoder circuit may be configured to bias the access line to one or more voltages. The decoder circuit may include a first transistor coupled with the access line and a second transistor coupled with the access line. The first transistor may be a planar transistor having a first gate electrode formed on a substrate, and the second transistor may be a trench transistor having a second gate electrode that extends into a cavity of the substrate, where a length of a first gate electrode may be greater than a length of the second gate electrode.
    Type: Application
    Filed: November 30, 2021
    Publication date: June 1, 2023
    Inventors: Ahmed Nayaz Noemaun, Chandra S. Danana, Durga P. Panda, Luca Laurin, Michael J. Irwin, Rekha Chithra Thomas, Sara Vigano, Stephen W. Russell, Zia A. Shafi