Abstract: A method includes, in various implementations, regulating a memory region for execute-only access, storing a set of instructions in the memory region, executing an early instruction among the set of instructions, and executing a set of subsequent instructions among the instructions. The early instruction loads a secret value into a volatile register. A correct execution of the subsequent instructions depends on the secret value being loaded into the volatile register. A system includes, in various implementations, a memory and a processor with one or more volatile registers. The processor regulates access to portions of the memory. The processor can load a secret value into the volatile register in response to executing a program stored in an execute-only portion of the memory. The processor is configured to lose, in response to an asynchronous event, information loaded in the volatile registers.

Abstract: A method includes, in various implementations, regulating a memory region for execute-only access, storing a set of instructions in the memory region, executing an early instruction among the set of instructions, and executing a set of subsequent instructions among the instructions. The early instruction loads a secret value into a volatile register. A correct execution of the subsequent instructions depends on the secret value being loaded into the volatile register. A system includes, in various implementations, a memory and a processor with one or more volatile registers. The processor regulates access to portions of the memory. The processor can load a secret value into the volatile register in response to executing a program stored in an execute-only portion of the memory. The processor is configured to lose, in response to an asynchronous event, information loaded in the volatile registers.

Abstract: Technologies for securing an electronic device include determining addresses of one or more memory pages, injecting for each memory page a portion of identifier data into the memory page, storing an indication of the identifier data injected into each of the memory pages, determining an attempt to access at least one of the memory pages, determining any of the identifier data present on a memory page associated with the attempt, comparing the indication of the identifier data with the determined identifier data present on the memory page, and, based on the comparison, determining whether to allow the access.

Abstract: Technologies for securing an electronic device include determining addresses of one or more memory pages, injecting for each memory page a portion of identifier data into the memory page, storing an indication of the identifier data injected into each of the memory pages, determining an attempt to access at least one of the memory pages, determining any of the identifier data present on a memory page associated with the attempt, comparing the indication of the identifier data with the determined identifier data present on the memory page, and, based on the comparison, determining whether to allow the access.

Abstract: Data is stored in a distributed data storage system comprising a plurality of disks. When a disk fails, system reliability is restored by executing a set of reconstructions according to a schedule. System reliability is characterized by a dynamic Normalcy Deviation Score. The schedule for executing the set of reconstructions is determined by a minimum intersection policy. A set of reconstructions is received and divided into a set of queues rank-ordered by redundancy level ranging from a lowest redundancy level to a highest redundancy level. For reconstructions in each queue, an intersection matrix is calculated. Diskscores for each disk are calculated. The schedule for the set of reconstructions is based at least in part on the intersection matrices, the Normal Deviation Scores, and the diskscores.

Abstract: Data is stored in a distributed data storage system comprising a plurality of disks. When a disk fails, system reliability is restored by executing a set of reconstructions according to a schedule. System reliability is characterized by a dynamic Normalcy Deviation Score. The schedule for executing the set of reconstructions is determined by a minimum intersection policy. A set of reconstructions is received and divided into a set of queues rank-ordered by redundancy level ranging from a lowest redundancy level to a highest redundancy level. For reconstructions in each queue, an intersection matrix is calculated. Diskscores for each disk are calculated. The schedule for the set of reconstructions is based at least in part on the intersection matrices, the Normal Deviation Scores, and the diskscores.