Patents by Inventor Remco Cornelis Herman Van De Beek
Remco Cornelis Herman Van De Beek has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10250269Abstract: An oscillator system includes a voltage controlled oscillator (VCO) circuit. The VCO circuit includes an output for providing an oscillation signal and input to receive a voltage that controls the frequency of the oscillation signal. The oscillator system includes a frequency to voltage circuit that receives the oscillation signal and produces a voltage that is dependent upon the frequency of the oscillation signal. The oscillator system includes a comparison circuit including an amplifier. The amplifier includes an inverting input, a non inverting input, and an output. During a first phase of the comparison circuit, the non inverting input receives a reference voltage and the inverting input is coupled to the output of the amplifier via a switch and to a capacitor wherein the capacitor samples the voltage of the output.Type: GrantFiled: July 24, 2017Date of Patent: April 2, 2019Assignee: NXP B.V.Inventors: Jos Verlinden, Sander Derksen, Dobson Paul Parlindungan Simanjuntak, Remco Cornelis Herman Van de Beek
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Publication number: 20190028110Abstract: An oscillator system includes a voltage controlled oscillator (VCO) circuit. The VCO circuit includes an output for providing an oscillation signal and input to receive a voltage that controls the frequency of the oscillation signal. The oscillator system includes a frequency to voltage circuit that receives the oscillation signal and produces a voltage that is dependent upon the frequency of the oscillation signal. The oscillator system includes a comparison circuit including an amplifier. The amplifier includes an inverting input, a non inverting input, and an output. During a first phase of the comparison circuit, the non inverting input receives a reference voltage and the inverting input is coupled to the output of the amplifier via a switch and to a capacitor wherein the capacitor samples the voltage of the output.Type: ApplicationFiled: July 24, 2017Publication date: January 24, 2019Inventors: JOS VERLINDEN, Sander Derksen, Dobson Paul Parlindungan Simanjuntak, Remco Cornelis Herman Van de Beek
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Patent number: 9825788Abstract: The present disclosure relates in general to devices, systems and methods for wireless communication, and in particular to communication using a proximity integrated circuit card (PICC). Example embodiments include a circuit (100) for a PICC, the circuit comprising an input stage (101), a decoding module (106) and a bias adjustment module (117), the bias adjustment module (117) configured to receive an output code from the decoding module and provide a bias adjustment signal to the input stage (101), the bias adjustment module (117) configured to iteratively tune the bias adjustment signal based on a measurement of the output code, with successive steps tuning the bias adjustment signal by a smaller amount until the output code is within a decoding range.Type: GrantFiled: June 3, 2016Date of Patent: November 21, 2017Assignee: NXP B.V.Inventors: Remco Cornelis Herman Van De Beek, Liang Zhang, LiSong Feng, Juhui Li, Alan Chang
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Patent number: 9768985Abstract: An apparatus includes an antenna that is configured to transmit a radio frequency signal across a transmission media having a channel response impairment. A transmission path includes an encoder circuit that encodes data on a carrier signal; and a pre-equalizer circuit that is configured to pre-distort the encoded data according to equalizer coefficients representing the channel response impairment. A first equalization path includes circuitry that generates the equalizer coefficients based upon transients resulting from a presence change event for the carrier signal. A second equalization path includes circuitry that generates the equalizer coefficients based upon knowledge of encoded data on the carrier signal. Selection circuitry selects between the first equalization path and the second equalization path.Type: GrantFiled: January 26, 2016Date of Patent: September 19, 2017Assignee: NXP B.V.Inventors: Massimo Ciacci, Ghiath Al-kadi, Remco Cornelis Herman van de Beek, Jos Verlinden
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Publication number: 20170214553Abstract: An apparatus includes an antenna that is configured to transmit a radio frequency signal across a transmission media having a channel response impairment. A transmission path includes an encoder circuit that encodes data on a carrier signal; and a pre-equalizer circuit that is configured to pre-distort the encoded data according to equalizer coefficients representing the channel response impairment. A first equalization path includes circuitry that generates the equalizer coefficients based upon transients resulting from a presence change event for the carrier signal. A second equalization path includes circuitry that generates the equalizer coefficients based upon knowledge of encoded data on the carrier signal. Selection circuitry selects between the first equalization path and the second equalization path.Type: ApplicationFiled: January 26, 2016Publication date: July 27, 2017Inventors: Massimo Ciacci, Ghiath Al-kadi, Remco Cornelis Herman van de Beek, Jos Verlinden
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Publication number: 20160359648Abstract: The present disclosure relates in general to devices, systems and methods for wireless communication, and in particular to communication using a proximity integrated circuit card (PICC). Example embodiments include a circuit (100) for a PICC, the circuit comprising an input stage (101), a decoding module (106) and a bias adjustment module (117), the bias adjustment module (117) configured to receive an output code from the decoding module and provide a bias adjustment signal to the input stage (101), the bias adjustment module (117) configured to iteratively tune the bias adjustment signal based on a measurement of the output code, with successive steps tuning the bias adjustment signal by a smaller amount until the output code is within a decoding range.Type: ApplicationFiled: June 3, 2016Publication date: December 8, 2016Inventors: Remco Cornelis Herman Van De Beek, Liang Zhang, LiSong Feng, Juhui Li, Alan Chang
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Patent number: 9426003Abstract: A proximity integrated circuit card bias adjustment. In one example, a decoding circuit, having an decoding range, for translating a data-frame signal having an information portion and a bias portion into an output code; and a bias adjust circuit coupled to receive the output code from the decoding circuit, and adjust the bias portion of the data-frame signal such that the output code is within the decoding range is disclosed. In another example, a method for proximity integrated circuit card bias adjustment, comprising: translating a data-frame signal having an information portion and a bias portion into an output code; and adjusting the bias portion of the data-frame signal such that the output code is within a decoding range is disclosed.Type: GrantFiled: December 18, 2013Date of Patent: August 23, 2016Assignee: NXP B.V.Inventors: Remco Cornelis Herman van de Beek, Massimo Ciacci, Ghiath Al-kadi
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Patent number: 9367787Abstract: The invention proposes a smart card which comprises a digital signal processing receiver that can automatically identify the type of a smart card reader based on the error vector magnitude of signals received from the reader. The digital signal processing receiver is able to reconfigure itself at runtime in order to optimally minimize its power consumption in dependence on the type of reader it is communicating with. Furthermore, the invention proposes a new preamble structure that comprises a basic part and an optional additional part.Type: GrantFiled: May 22, 2015Date of Patent: June 14, 2016Assignee: NXP B.V.Inventors: Ghiath Al-Kadi, Massimo Ciacci, Remco Cornelis Herman van de Beek
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Publication number: 20150254543Abstract: The invention proposes a smart card which comprises a digital signal processing receiver that can automatically identify the type of a smart card reader based on the error vector magnitude of signals received from the reader. The digital signal processing receiver is able to reconfigure itself at runtime in order to optimally minimize its power consumption in dependence on the type of reader it is communicating with. Furthermore, the invention proposes a new preamble structure that comprises a basic part and an optional additional part.Type: ApplicationFiled: May 22, 2015Publication date: September 10, 2015Applicant: NXP B.V.Inventors: Ghiath Al-Kadi, Massimo Ciacci, Remco Cornelis Herman van de Beek
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Patent number: 9077571Abstract: Equalization circuits and methods are implemented for a variety of applications. According to one such application, a transmitting device wirelessly communicates using an antenna. The device has a transmission circuit that is configured and arranged to transmit a first wireless signal using magnetic coupling between the antenna and a remote device, the coupling occurring over a wireless medium. A receiver circuit of the transmitting device is configured and arranged to receive a second wireless signal that is from the antenna and that represents the first wireless signal as modified by the coupling occurring over the wireless medium. An error circuit of the device is configured and arranged to generate an error signal by comparing the first wireless signal to the second wireless signal. An equalizer circuit of the device is configured and arranged to pre-code the first wireless signal with coding that compensates for inter-symbol interference by compensating for the error signal.Type: GrantFiled: September 9, 2011Date of Patent: July 7, 2015Assignee: NXP B.V.Inventors: Remco Cornelis Herman van de Beek, Massimo Ciacci
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Publication number: 20150172080Abstract: A proximity integrated circuit card bias adjustment. In one example, a decoding circuit, having an decoding range, for translating a data-frame signal having an information portion and a bias portion into an output code; and a bias adjust circuit coupled to receive the output code from the decoding circuit, and adjust the bias portion of the data-frame signal such that the output code is within the decoding range is disclosed. In another example, a method for proximity integrated circuit card bias adjustment, comprising: translating a data-frame signal having an information portion and a bias portion into an output code; and adjusting the bias portion of the data-frame signal such that the output code is within a decoding range is disclosed.Type: ApplicationFiled: December 18, 2013Publication date: June 18, 2015Applicant: NXP B.V.Inventors: Remco Cornelis Herman van de Beek, Massimo Ciacci, Ghiath Al-kadi
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Patent number: 9038916Abstract: The invention proposes a smart card which comprises a digital signal processing receiver that can automatically identify the type of a smart card reader based on the error vector magnitude of signals received from the reader. The digital signal processing receiver is able to reconfigure itself at runtime in order to optimally minimize its power consumption in dependence on the type of reader it is communicating with. Furthermore, the invention proposes a new preamble structure that comprises a basic part and an optional additional part.Type: GrantFiled: October 4, 2011Date of Patent: May 26, 2015Assignee: NXP, B.V.Inventors: Ghiath Al-Kadi, Massimo Ciacci, Remco Cornelis Herman van de Beek
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Patent number: 9014323Abstract: Various aspects of the present disclosure are directed apparatuses and methods including a first phase locked loop (PLL) circuit and a second PLL circuit. The first PLL circuit receives a carrier signal that is transmitted over a communications channel from a non-synchronous device, and generates a PLL-PLL control signal. The second PLL circuit receives a stable reference-oscillation signal, and, in response to the PLL-PLL control signal indicating a frequency offset, adjusts a fractional divider ratio of the second PLL circuit. The first PLL circuit and the second PLL circuit are configured to produce an output frequency signal that is synchronous to the carrier signal.Type: GrantFiled: August 30, 2013Date of Patent: April 21, 2015Assignee: NXP B.V.Inventors: Jos Verlinden, Remco Cornelis Herman van de Beek
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Publication number: 20150063517Abstract: Various aspects of the present disclosure are directed apparatuses and methods including a first phase locked loop (PLL) circuit and a second PLL circuit. The first PLL circuit receives a carrier signal that is transmitted over a communications channel from a non-synchronous device, and generates a PLL-PLL control signal. The second PLL circuit receives a stable reference-oscillation signal, and, in response to the PLL-PLL control signal indicating a frequency offset, adjusts a fractional divider ratio of the second PLL circuit. The first PLL circuit and the second PLL circuit are configured to produce an output frequency signal that is synchronous to the carrier signal.Type: ApplicationFiled: August 30, 2013Publication date: March 5, 2015Applicant: NXP B.V.Inventors: Jos Verlinden, Remco Cornelis Herman van de Beek
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Patent number: 8964904Abstract: Embodiments of a method for processing a baseband signal in a Direct Current (DC)-suppressed system, a system for processing a baseband signal in a DC-suppressed system, and a smart card are described. In one embodiment, a method for processing a baseband signal in a DC-suppressed system involves processing the baseband signal in the analog domain with a first high pass filter (HPF), converting the processed baseband signal to a digital signal, and processing the digital signal in the digital domain with a second HPF to provide a discrete-time differentiation of the baseband signal. Other embodiments are also described.Type: GrantFiled: January 7, 2013Date of Patent: February 24, 2015Assignee: NXP B.V.Inventors: Massimo Ciacci, Remco Cornelis Herman van de Beek, Ghiath Al-Kadi
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Patent number: 8842720Abstract: The method comprises receiving an input stream of symbols (x(i)) representing a phase change and magnitude of an RF signal, the magnitudes of the symbols are constant, the phase changes of the symbols encode digital information, and adjust the input stream of symbols to reduce inter-symbol interference. The adjusting iteratively determines a next symbol of the equalized stream (x?(n)) after receiving a next symbol of the input stream (x(n)) by multiplying the next symbol of the input stream (x(n)) with a next adjusting real number (a(n)), multiplying a previous symbol of the input stream (x(n?1)) with a previous adjusting real number (a(n?1)), the previous symbol being received before the next symbol of the input stream, and the next symbol of the equalized stream is computed from the multiplied next symbol and the multiplied previous symbol of the input stream.Type: GrantFiled: June 27, 2013Date of Patent: September 23, 2014Assignee: NXP B.V.Inventors: Remco Cornelis Herman van de Beek, Massimo Ciacci, Jos Verlinden, Ghaith Al-kadi
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Patent number: 8781051Abstract: A symbol clock recovery circuit is provided for a data communication system using coherent demodulation. The symbol clock recovery circuit comprises an analog-to-digital converter comprising a first input for receiving a coherent-detected baseband analog signal derived from a carrier signal, a second input for receiving an adapted symbol clock signal, and an output for outputting a digital signal comprising a frame having a preamble with at least two symbols. The symbol clock recovery circuit comprises further a phase shifting unit comprising a first input for receiving a symbol clock signal derived from the carrier signal, and a timing detector, comprising a first input for receiving the digital signal from the analog-to-digital converter and an output for providing a signal comprising information about an optimum sample phase to the phase shifting unit.Type: GrantFiled: March 12, 2012Date of Patent: July 15, 2014Assignee: NXP, B.V.Inventors: Massimo Ciacci, Remco Cornelis Herman van de Beek, Ghiath Al-kadi
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Publication number: 20140192934Abstract: Embodiments of a method for processing a baseband signal in a Direct Current (DC)-suppressed system, a system for processing a baseband signal in a DC-suppressed system, and a smart card are described. In one embodiment, a method for processing a baseband signal in a DC-suppressed system involves processing the baseband signal in the analog domain with a first high pass filter (HPF), converting the processed baseband signal to a digital signal, and processing the digital signal in the digital domain with a second HPF to provide a discrete-time differentiation of the baseband signal. Other embodiments are also described.Type: ApplicationFiled: January 7, 2013Publication date: July 10, 2014Applicant: NXP B.V.Inventors: Massimo Ciacci, Remco Cornelis Herman van de Beek, Ghiath Al-Kadi
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Patent number: 8737449Abstract: A frequency hopping receiver circuit has a frequency converter (12) and a hopping control circuit (14) coupled to the frequency converter (12), and configured to control frequency hopping of the received frequency, by controlling changes in frequency shift applied by the frequency converter (12). The frequency change is applied in combination with a temporary reduction in conversion gain of the frequency converter (12) during the change in frequency shift. The frequency converter may contain a mixer (122), a local oscillator circuit (120) and a controllable amplifier (124) coupled between the input of the frequency converter (12) and the mixer (122) or between the mixer (122) and the output of the frequency converter (12), or between the local oscillator circuit (120) and the local oscillator input of the mixer (122).Type: GrantFiled: August 18, 2009Date of Patent: May 27, 2014Assignee: NXP, B.V.Inventors: Jozef Reinerus Maria Bergervoet, Harish Kundur Subramaniyan, Remco Cornelis Herman Van De Beek
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Publication number: 20140003484Abstract: A method for pre-equalizing a digital modulated RF signal is presented. The method comprises receiving an input stream of symbols (x(i)) representing a phase change and magnitude of an RF signal, the magnitudes of the symbols in the input stream are constant, the phase changes of the symbols in the input stream encode digital information, and adjusting the input stream of symbols to reduce inter-symbol interference in transmission of an RF signal modulated according to the input stream, thus obtaining an equalized stream of symbols (x?(i)), each symbol of the equalized stream representing a phase change and magnitude of an RF signal.Type: ApplicationFiled: June 27, 2013Publication date: January 2, 2014Inventors: Remco Cornelis Herman van de Beek, Massimo Ciacci, Jos Verlinden, Ghiath Al-kadi