Abstract: A differential amplifier contains a pair of differential portions (10 and 12) that together provide representative signal amplification across the full amplifier power-supply voltage range. Each differential portion normally contains a pair of like-polarity differentially coupled FETs (Q1 and Q2, Q3 and Q4) that divide a tail current (I.sub.N, I.sub.P) into a pair of main currents (I.sub.1 and I.sub.2, I.sub.3 and I.sub.4). The two FET pairs are complementary. A square-root circuit (24) controls the tail currents in such a way that the sum of their square roots is largely constant. Consequently, the amplifier transconductance is largely constant.

Abstract: A current amplifier has an input terminal (1) for receiving an input current and an output terminal (2) for supplying an output current. A first transistor (T.sub.1) has a base-emitter junction coupled to the input terminal and a second transistor (T.sub.2) has a collector coupled to the output terminal and an emitter arranged in series with a voltage source (4). The series arrangement of the voltage source and the base-emitter junction of the second transistor is arranged in parallel with the base-emitter junction of the first transistor. The first transistor is of the NPN conductivity type and the second transistor is of the PNP conductivity type. The low internal series resistance of the NPN transistor T.sub.1 develops a relatively small voltage drop so that the attenuated output current (I.sub.out) is a linear function of the input current over a wide range of input currents.