Patents by Inventor Remco M. Stoutjesdijk

Remco M. Stoutjesdijk has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7804434
    Abstract: In a switched-capacitor circuit such as a DAC, charges are accumulated by a plurality of sampling capacitors in dependence upon input digital data during a sampling phase; then, during a sharing phase these charges are shared with a holding capacitor which is connected across an opamp. In the so-called bipolar charging type switched-capacitor DAC, the signal provided by the sampling capacitors is doubled by connecting their opposite sides to positive and negative reference voltages during the sampling phase. However, parasitic capacitances associated with the sampling capacitors then cause a disturbance to the input of the operational amplifier during the sharing phase. By equalising the input sides of the sampling capacitors to a reference voltage, prior to the sharing phase, this disturbance is avoided thereby allowing a low-power opamp to be employed in the DAC. This equalising can be achieved by adding a short equalising clock phase between the usual sampling and sharing clock phases of the DAC.
    Type: Grant
    Filed: March 30, 2009
    Date of Patent: September 28, 2010
    Assignee: Wolfson Microelectronics plc
    Inventor: Remco M. Stoutjesdijk
  • Publication number: 20090243902
    Abstract: In a switched-capacitor circuit such as a DAC, charges are accumulated by a plurality of sampling capacitors in dependence upon input digital data during a sampling phase; then, during a sharing phase these charges are shared with a holding capacitor which is connected across an opamp. In the so-called bipolar charging type switched-capacitor DAC, the signal provided by the sampling capacitors is doubled by connecting their opposite sides to positive and negative reference voltages during the sampling phase. However, parasitic capacitances associated with the sampling capacitors then cause a disturbance to the input of the operational amplifier during the sharing phase. By equalising the input sides of the sampling capacitors to a reference voltage, prior to the sharing phase, this disturbance is avoided thereby allowing a low-power opamp to be employed in the DAC. This equalising can be achieved by adding a short equalising clock phase between the usual sampling and sharing clock phases of the DAC.
    Type: Application
    Filed: March 30, 2009
    Publication date: October 1, 2009
    Inventor: Remco M. Stoutjesdijk