Patents by Inventor Remigius G. Shatas
Remigius G. Shatas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7320043Abstract: A network interface is described in which a single computer bus is split over a long distance into two or more inter-communicating buses. On one bus, processing and applications are provided and on the other remote bus, peripheral and local controllers are provided. The buses communicate through a series of: bridge, FPGA, FPGA and bridge. Between the FPGAs, a communication path provides long distance communication.Type: GrantFiled: September 10, 2004Date of Patent: January 15, 2008Assignee: Avocent Huntsville CorporationInventors: Remigius G. Shatas, Robert R. Asprey, Christopher L. Thomas, Greg O'Bryant, Greg Luterman, Jeffrey E. Choun
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Patent number: 7020732Abstract: A network interface is described in which a single computer bus is split over a long distance into two or more inter-communicating buses. On one bus, processing and applications are provided and on the other remote bus, peripheral and local controllers are provided. The buses communicate through a series of: bridge, FPGA, FPGA and bridge. Between the FPGAs, a communication path provides long distance communication.Type: GrantFiled: March 6, 2003Date of Patent: March 28, 2006Assignee: Avocent Huntsville CorporationInventors: Remigius G. Shatas, Robert R. Asprey, Christopher L. Thomas, Greg O'Bryant, Greg Luterman, Jeffrey E. Choun
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Patent number: 6807639Abstract: A network interface is described in which a single computer bus is split over a long distance into two or more inter-communicating buses. On one bus, processing and applications are provided and on the other remote bus, peripheral and local controllers are provided. The buses communicate through a series of: bridge, FPGA, FPGA and bridge. Between the FPGAs, a communication path provides long distance communication.Type: GrantFiled: May 20, 2002Date of Patent: October 19, 2004Assignee: Avocent CorporationInventors: Remigius G. Shatas, Robert R. Asprey, Christopher L. Thomas, Greg O'Bryant, Greg Luterman, Jeffrey E. Choun
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Patent number: 6748473Abstract: A split computer (122) comprises a main module (140) remotely connected by external PCI bus (170) to a input/output (I/O) or extension module (142). The main module (140) comprises a processor (181) and an external PCI bus first interface (300). The input/output (I/O) module comprises one or more input and/or output device controllers and an external PCI bus second interface. The external PCI bus connects the external bus first interface of the main module with the external bus second interface of the input/output (I/O) module. The main module executes application programs, maintains user configurations, and maintains application configurations. Yet since the main module is located remotely, e.g., at a data center (150), the both security and centralized management are realized using existing hardware and software. The input/output (I/O) module has a relative small footprint and primarily performs input and output operations.Type: GrantFiled: October 29, 1999Date of Patent: June 8, 2004Assignee: Avocent Huntsville CorporationInventors: Remigius G. Shatas, Robert R. Asprey, Christopher L. Thomas, Greg O'Bryant, Greg Luterman, Jeffrey E. Choun
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Publication number: 20030212755Abstract: A network interface is described in which a single computer bus is split over a long distance into two or more inter-communicating buses. On one bus, processing and applications are provided and on the other remote bus, peripheral and local controllers are provided. The buses communicate through a series of: bridge, FPGA, FPGA and bridge. Between the FPGAs, a communication path provides long distance communication.Type: ApplicationFiled: March 6, 2003Publication date: November 13, 2003Applicant: Cybex Computer Products CorporationInventors: Remigius G. Shatas, Robert R. Asprey, Christopher L. Thomas, Greg O'Bryant, Greg Luterman, Jeffrey E. Choun
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Publication number: 20020138682Abstract: A network interface is described in which a single computer bus is split over a long distance into two or more inter-communicating buses. On one bus, processing and applications are provided and on the other remote bus, peripheral and local controllers are provided. The buses communicate through a series of: bridge, FPGA, FPGA and bridge. Between the FPGAs, a communication path provides long distance communication.Type: ApplicationFiled: May 20, 2002Publication date: September 26, 2002Applicant: Cybex Computer Products CorporationInventors: Remigius G. Shatas, Robert R. Asprey, Christopher L. Thomas, Greg O'Bryant, Greg Luterman, Jeffrey E. Choun
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Patent number: 6418494Abstract: A network interface is described in which a single computer bus is split over a long distance into two or more intercommunicating buses. On one bus, processing and applications are provided and on the other remote bus, peripheral and local controllers are provided. The buses communicate through a series of: bridge, FPGA, FPGA and bridge. Between the FPGAs, a communication path provides long distance communication.Type: GrantFiled: October 29, 1999Date of Patent: July 9, 2002Assignee: Cybex Computer Products CorporationInventors: Remigius G. Shatas, Robert R. Asprey, Christopher L. Thomas, Greg O'Bryant, Greg Luterman, Jeffrey E. Choun
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Patent number: 5504540Abstract: A cabling arrangement is disclosed for transmitting analog VGA video signals via a cable having insulated conductors and without the use of micro coaxial conductors. In this cable, the red, green, and blue video signals are applied to a first set of conductors grouped against one side of the cable. The horizontal and vertical sync signals are applied to a second set of conductors grouped along an opposite side of the cable. Interposed between the first and second sets of conductors is a plurality of conductors carrying stable potentials, such as ground potentials and identification bit potentials. The separation effected by the interposed conductors, and the interposed conductors themselves, provides effective shielding and isolation of the first and second sets of conductors.Type: GrantFiled: December 7, 1993Date of Patent: April 2, 1996Assignee: Cybex Computer Products CorporationInventor: Remigius G. Shatas
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Patent number: 5465105Abstract: An automatic signal switching system is provided having a plurality of communications links, each link having at one end a plurality of conductors terminating in a plug configured to be uniquely couplable to a particular source of computer video and related signals. The opposite end of each link is provided with a connector having terminals coupled to respective conductors in a standardized arrangement. This connector is coupled to sensing circuitry for sensing the particular type of computer signals, with the computer signals being provided as an output appropriately configured for that particular type of computer signal. The particular types of signals are applied to analog and digital buffers, which are selectively enabled to pass the computer video signals.Type: GrantFiled: September 29, 1993Date of Patent: November 7, 1995Assignee: Cybex CorporationInventors: Remigius G. Shatas, David L. Ligon
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Patent number: 5353409Abstract: This invention relates to circuitry for extending TTL signals from a computer to a remotely located monitor and keyboard and which uses a first signal conditioning circuit proximate the computer to generally reduce amplitude of the video signals and bias them to a selected potential, after which the signals are applied to discrete conductors of an extended cable. The cable, in three embodiments described herein, may be up to 250 feet, 400 feet, or 1,000 feet. A second signal conditioning circuit at the monitor and keyboard end of the cable receives the attenuated signals and utilizes a threshold or pair of thresholds to effect reconstruction of the video signals prior to inputting them to the monitor. Significantly, amplitude reduction or attenuation of the video signals generally reduces high frequency video noise appearing on the keyboard clock conductor of the cable, preventing keyboard errors.Type: GrantFiled: July 19, 1990Date of Patent: October 4, 1994Assignee: Cybex CorporationInventors: Robert R. Asprey, Remigius G. Shatas
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Patent number: 5323298Abstract: An enclosure is constructed of electromagnetic radiation shielding material for housing and supporting circuitry that emits electromagnetic interference. Symmetrical top and bottom covers are fabricated of a generally U-shaped configuration, with a downwardly extending tab on one side region of the upper cover and an upwardly extending tab on an opposite side region of the lower cover, these tabs for covering a butt joint between the upper and lower covers. Symmetrical front and rear covers are each constructed having inwardly extending sides also for covering the butt joints, with a lip on each of these side regions. Slots in these lips support circuit boards in the enclosure. Segmented lips on upper and lower sides of the front and rear covers contact upper and lower regions of the upper and lower covers. Constructed as such, there are no significant gaps in the enclosure to radiate electromagnetic radiation.Type: GrantFiled: July 13, 1992Date of Patent: June 21, 1994Inventors: Remigius G. Shatas, Steven F. Brown
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Patent number: 5268676Abstract: A communications link up to about 300 feet for use between a computer and display unit receives analog R, G, and B signals from the computer and applies them to discrete current amplifiers that modulate signal current applied to discrete conductors of a 300 foot cable. Impedance matching networks match the R, G, and B signals to the characteristic impedance to the cable. The R, G, and B signals are received near the monitor, and coupled to discrete emitter-follower transistors, which amplify current of the signals prior to inputting the signals to the monitor. The horizontal sync signal is applied to a conductor of the cable without impedance matching, allowing the conductor to attenuate the horizontal sync signal and reduce noise radiation.Type: GrantFiled: March 5, 1990Date of Patent: December 7, 1993Assignee: Cybex CorporationInventors: Robert R. Asprey, Remigius G. Shatas
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Patent number: 5193200Abstract: A communications extension link for use between a computer and display unit (K.D.U.) has at the computer site a first interface circuit connected to it and adjacent to the keyboard and display unit a second interface circuit connected to it. The two interface circuits may then be spaced up to 300 feet for a monochrome K.D.U. and up to 150 feet for a color K.D.U. by an extension cable. The first interface circuit includes capacitors connected between keyboard data and clock lines and a positive supply terminal, and TTL buffer amplifiers coupled in single ended configuration are placed in the signal lines relating to video information transmission. The video signals (VS, HS, primary RGB and second rgb) are then each attenuated prior to being passed over the longest cable run, after which they are received by a second interface circuit.Type: GrantFiled: December 5, 1989Date of Patent: March 9, 1993Assignee: Cybex CorporationInventors: Robert R. Asprey, Remigius G. Shatas
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Patent number: 4885718Abstract: A communications extension link for use between a computer and a keyboard and display unit has at the computer site a first interface circuit connected to it and adjacent to the keyboard and display unit a second interface circuit connected to it. The two interface circuits may then be spaced serveral hundred feet by an extension cable. The first interface circuit includes capacitors connected between keyboard data and clock lines and a positive supply terminal, and buffer amplifiers are placed in the signal lines relating to the display unit. The second interface circuit employs discrete resistors between clock and data lines and the positive supply terminal, and between the vertical sync line and logic ground. In addition, capacitance is added between the positive supply terminal and logic ground.Type: GrantFiled: September 11, 1987Date of Patent: December 5, 1989Assignee: Cybex CorporationInventors: Robert R. Asprey, Remigius G. Shatas