Patents by Inventor Rena Suzuki
Rena Suzuki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20250072136Abstract: The present technology relates to a semiconductor device, a solid-state image pickup element, an imaging device, and an electronic apparatus that can suppress characteristic fluctuations caused by capacitance fluctuations due to a dummy wire, while maintaining an affixing bonding strength by the dummy wire. Two or more chips in which wires that are electrically connected are formed on bonding surfaces and the bonding surfaces opposing each other are bonded to be laminated are included and, with respect to a region where the wires are periodically and repeatedly disposed in sharing units each made up of a plurality of pixels sharing the same floating diffusion contact, a dummy wire is disposed at the center position thereof on the bonding surface at a pitch of the sharing unit. The present technology can be applied to a CMOS image sensor.Type: ApplicationFiled: November 14, 2024Publication date: February 27, 2025Applicant: SONY GROUP CORPORATIONInventors: Rena SUZUKI, Takeshi MATSUNUMA, Naoki JYO, Yoshihisa KAGAWA
-
Patent number: 11329078Abstract: Disclosed is a solid-state imaging device including a plurality of pixels and a plurality of on-chip lenses. The plurality of pixels are arranged in a matrix pattern. Each of the pixels has a photoelectric conversion portion configured to photoelectrically convert light incident from a rear surface side of a semiconductor substrate. The plurality of on-chip lenses are arranged for every other pixel. The on-chip lenses are larger in size than the pixels. Each of color filters at the pixels where the on-chip lenses are present has a cross-sectional shape whose upper side close to the on-chip lens is the same in width as the on-chip lens and whose lower side close to the photoelectric conversion portion is shorter than the upper side.Type: GrantFiled: September 2, 2020Date of Patent: May 10, 2022Assignee: SONY CORPORATIONInventors: Rena Suzuki, Hiroki Tojinbara, Ryoto Yoshita, Yoichi Ueda
-
Publication number: 20210233946Abstract: The present technology relates to a semiconductor device, a solid-state image pickup element, an imaging device, and an electronic apparatus that can suppress characteristic fluctuations caused by capacitance fluctuations due to a dummy wire, while maintaining an affixing bonding strength by the dummy wire. Two or more chips in which wires that are electrically connected are formed on bonding surfaces and the bonding surfaces opposing each other are bonded to be laminated are included and, with respect to a region where the wires are periodically and repeatedly disposed in sharing units each made up of a plurality of pixels sharing the same floating diffusion contact, a dummy wire is disposed at the center position thereof on the bonding surface at a pitch of the sharing unit. The present technology can be applied to a CMOS image sensor.Type: ApplicationFiled: April 13, 2021Publication date: July 29, 2021Applicant: SONY GROUP CORPORATIONInventors: Rena SUZUKI, Takeshi MATSUNUMA, Naoki JYO, Yoshihisa KAGAWA
-
Patent number: 11004879Abstract: The present technology relates to a semiconductor device, a solid-state image pickup element, an imaging device, and an electronic apparatus that can suppress characteristic fluctuations caused by capacitance fluctuations due to a dummy wire, while maintaining an affixing bonding strength by the dummy wire. Two or more chips in which wires that are electrically connected are formed on bonding surfaces and the bonding surfaces opposing each other are bonded to be laminated are included and, with respect to a region where the wires are periodically and repeatedly disposed in sharing units each made up of a plurality of pixels sharing the same floating diffusion contact, a dummy wire is disposed at the center position thereof on the bonding surface at a pitch of the sharing unit. The present technology can be applied to a CMOS image sensor.Type: GrantFiled: February 19, 2020Date of Patent: May 11, 2021Assignee: SONY CORPORATIONInventors: Rena Suzuki, Takeshi Matsunuma, Naoki Jyo, Yoshihisa Kagawa
-
Publication number: 20200403015Abstract: Disclosed is a solid-state imaging device including a plurality of pixels and a plurality of on-chip lenses. The plurality of pixels are arranged in a matrix pattern. Each of the pixels has a photoelectric conversion portion configured to photoelectrically convert light incident from a rear surface side of a semiconductor substrate. The plurality of on-chip lenses are arranged for every other pixel. The on-chip lenses are larger in size than the pixels. Each of color filters at the pixels where the on-chip lenses are present has a cross-sectional shape whose upper side close to the on-chip lens is the same in width as the on-chip lens and whose lower side close to the photoelectric conversion portion is shorter than the upper side.Type: ApplicationFiled: September 2, 2020Publication date: December 24, 2020Applicant: Sony CorporationInventors: Rena Suzuki, Hiroki Tojinbara, Ryoto Yoshita, Yoichi Ueda
-
Patent number: 10818722Abstract: Disclosed is a solid-state imaging device including a plurality of pixels and a plurality of on-chip lenses. The plurality of pixels are arranged in a matrix pattern. Each of the pixels has a photoelectric conversion portion configured to photoelectrically convert light incident from a rear surface side of a semiconductor substrate. The plurality of on-chip lenses are arranged for every other pixel. The on-chip lenses are larger in size than the pixels. Each of color filters at the pixels where the on-chip lenses are present has a cross-sectional shape whose upper side close to the on-chip lens is the same in width as the on-chip lens and whose lower side close to the photoelectric conversion portion is shorter than the upper side.Type: GrantFiled: July 12, 2019Date of Patent: October 27, 2020Assignee: Sony CorporationInventors: Rena Suzuki, Hiroki Tojinbara, Ryoto Yoshita, Yoichi Ueda
-
Publication number: 20200185433Abstract: The present technology relates to a semiconductor device, a solid-state image pickup element, an imaging device, and an electronic apparatus that can suppress characteristic fluctuations caused by capacitance fluctuations due to a dummy wire, while maintaining an affixing bonding strength by the dummy wire. Two or more chips in which wires that are electrically connected are formed on bonding surfaces and the bonding surfaces opposing each other are bonded to be laminated are included and, with respect to a region where the wires are periodically and repeatedly disposed in sharing units each made up of a plurality of pixels sharing the same floating diffusion contact, a dummy wire is disposed at the center position thereof on the bonding surface at a pitch of the sharing unit. The present technology can be applied to a CMOS image sensor.Type: ApplicationFiled: February 19, 2020Publication date: June 11, 2020Applicant: SONY CORPORATIONInventors: Rena SUZUKI, Takeshi MATSUNUMA, Naoki JYO, Yoshihisa KAGAWA
-
Patent number: 10665623Abstract: The present technology relates to a semiconductor device, a solid-state image pickup element, an imaging device, and an electronic apparatus that can suppress characteristic fluctuations caused by capacitance fluctuations due to a dummy wire, while maintaining an affixing bonding strength by the dummy wire. Two or more chips in which wires that are electrically connected are formed on bonding surfaces and the bonding surfaces opposing each other are bonded to be laminated are included and, with respect to a region where the wires are periodically and repeatedly disposed in sharing units each made up of a plurality of pixels sharing the same floating diffusion contact, a dummy wire is disposed at the center position thereof on the bonding surface at a pitch of the sharing unit. The present technology can be applied to a CMOS image sensor.Type: GrantFiled: February 12, 2016Date of Patent: May 26, 2020Assignee: SONY CORPORATIONInventors: Rena Suzuki, Takeshi Matsunuma, Naoki Jyo, Yoshihisa Kagawa
-
Publication number: 20190341418Abstract: Disclosed is a solid-state imaging device including a plurality of pixels and a plurality of on-chip lenses. The plurality of pixels are arranged in a matrix pattern. Each of the pixels has a photoelectric conversion portion configured to photoelectrically convert light incident from a rear surface side of a semiconductor substrate. The plurality of on-chip lenses are arranged for every other pixel. The on-chip lenses are larger in size than the pixels. Each of color filters at the pixels where the on-chip lenses are present has a cross-sectional shape whose upper side close to the on-chip lens is the same in width as the on-chip lens and whose lower side close to the photoelectric conversion portion is shorter than the upper side.Type: ApplicationFiled: July 12, 2019Publication date: November 7, 2019Applicant: Sony CorporationInventors: Rena Suzuki, Hiroki Tojinbara, Ryoto Yoshita, Yoichi Ueda
-
Patent number: 10367027Abstract: Disclosed is a solid-state imaging device including a plurality of pixels and a plurality of on-chip lenses. The plurality of pixels are arranged in a matrix pattern. Each of the pixels has a photoelectric conversion portion configured to photoelectrically convert light incident from a rear surface side of a semiconductor substrate. The plurality of on-chip lenses are arranged for every other pixel. The on-chip lenses are larger in size than the pixels. Each of color filters at the pixels where the on-chip lenses are present has a cross-sectional shape whose upper side close to the on-chip lens is the same in width as the on-chip lens and whose lower side close to the photoelectric conversion portion is shorter than the upper side.Type: GrantFiled: October 5, 2017Date of Patent: July 30, 2019Assignee: Sony CorporationInventors: Rena Suzuki, Hiroki Tojinbara, Ryoto Yoshita, Yoichi Ueda
-
Patent number: 9960202Abstract: Disclosed is a solid-state imaging device including a plurality of pixels and a plurality of on-chip lenses. The plurality of pixels are arranged in a matrix pattern. Each of the pixels has a photoelectric conversion portion configured to photoelectrically convert light incident from a rear surface side of a semiconductor substrate. The plurality of on-chip lenses are arranged for every other pixel. The on-chip lenses are larger in size than the pixels. Each of color filters at the pixels where the on-chip lenses are present has a cross-sectional shape whose upper side close to the on-chip lens is the same in width as the on-chip lens and whose lower side close to the photoelectric conversion portion is shorter than the upper side.Type: GrantFiled: December 6, 2016Date of Patent: May 1, 2018Assignee: Sony CorporationInventors: Rena Suzuki, Hiroki Tojinbara, Ryoto Yoshita, Yoichi Ueda
-
Publication number: 20180047776Abstract: Disclosed is a solid-state imaging device including a plurality of pixels and a plurality of on-chip lenses. The plurality of pixels are arranged in a matrix pattern. Each of the pixels has a photoelectric conversion portion configured to photoelectrically convert light incident from a rear surface side of a semiconductor substrate. The plurality of on-chip lenses are arranged for every other pixel. The on-chip lenses are larger in size than the pixels. Each of color filters at the pixels where the on-chip lenses are present has a cross-sectional shape whose upper side close to the on-chip lens is the same in width as the on-chip lens and whose lower side close to the photoelectric conversion portion is shorter than the upper side.Type: ApplicationFiled: October 5, 2017Publication date: February 15, 2018Inventors: Rena Suzuki, Hiroki Tojinbara, Ryoto Yoshita, Yoichi Ueda
-
Publication number: 20180033813Abstract: The present technology relates to a semiconductor device, a solid-state image pickup element, an imaging device, and an electronic apparatus that can suppress characteristic fluctuations caused by capacitance fluctuations due to a dummy wire, while maintaining an affixing bonding strength by the dummy wire. Two or more chips in which wires that are electrically connected are formed on bonding surfaces and the bonding surfaces opposing each other are bonded to be laminated are included and, with respect to a region where the wires are periodically and repeatedly disposed in sharing units each made up of a plurality of pixels sharing the same floating diffusion contact, a dummy wire is disposed at the center position thereof on the bonding surface at a pitch of the sharing unit. The present technology can be applied to a CMOS image sensor.Type: ApplicationFiled: February 12, 2016Publication date: February 1, 2018Inventors: Rena SUZUKI, Takeshi MATSUNUMA, Naoki JYO, Yoshihisa KAGAWA
-
Publication number: 20170084659Abstract: Disclosed is a solid-state imaging device including a plurality of pixels and a plurality of on-chip lenses. The plurality of pixels are arranged in a matrix pattern. Each of the pixels has a photoelectric conversion portion configured to photoelectrically convert light incident from a rear surface side of a semiconductor substrate. The plurality of on-chip lenses are arranged for every other pixel. The on-chip lenses are larger in size than the pixels. Each of color filters at the pixels where the on-chip lenses are present has a cross-sectional shape whose upper side close to the on-chip lens is the same in width as the on-chip lens and whose lower side close to the photoelectric conversion portion is shorter than the upper side.Type: ApplicationFiled: December 6, 2016Publication date: March 23, 2017Inventors: Rena Suzuki, Hiroki Tojinbara, Ryoto Yoshita, Yoichi Ueda
-
Patent number: 9548326Abstract: Disclosed is a solid-state imaging device including a plurality of pixels and a plurality of on-chip lenses. The plurality of pixels are arranged in a matrix pattern. Each of the pixels has a photoelectric conversion portion configured to photoelectrically convert light incident from a rear surface side of a semiconductor substrate. The plurality of on-chip lenses are arranged for every other pixel. The on-chip lenses are larger in size than the pixels. Each of color filters at the pixels where the on-chip lenses are present has a cross-sectional shape whose upper side close to the on-chip lens is the same in width as the on-chip lens and whose lower side close to the photoelectric conversion portion is shorter than the upper side.Type: GrantFiled: January 12, 2016Date of Patent: January 17, 2017Assignee: Sony CorporationInventors: Rena Suzuki, Hiroki Tojinbara, Ryoto Yoshita, Yoichi Ueda
-
Publication number: 20160126273Abstract: Disclosed is a solid-state imaging device including a plurality of pixels and a plurality of on-chip lenses. The plurality of pixels are arranged in a matrix pattern. Each of the pixels has a photoelectric conversion portion configured to photoelectrically convert light incident from a rear surface side of a semiconductor substrate. The plurality of on-chip lenses are arranged for every other pixel. The on-chip lenses are larger in size than the pixels. Each of color filters at the pixels where the on-chip lenses are present has a cross-sectional shape whose upper side close to the on-chip lens is the same in width as the on-chip lens and whose lower side close to the photoelectric conversion portion is shorter than the upper side.Type: ApplicationFiled: January 12, 2016Publication date: May 5, 2016Inventors: Rena Suzuki, Hiroki Tojinbara, Ryoto Yoshita, Yoichi Ueda
-
Patent number: 9276032Abstract: Disclosed is a solid-state imaging device including a plurality of pixels and a plurality of on-chip lenses. The plurality of pixels are arranged in a matrix pattern. Each of the pixels has a photoelectric conversion portion configured to photoelectrically convert light incident from a rear surface side of a semiconductor substrate. The plurality of on-chip lenses are arranged for every other pixel. The on-chip lenses are larger in size than the pixels. Each of color filters at the pixels where the on-chip lenses are present has a cross-sectional shape whose upper side close to the on-chip lens is the same in width as the on-chip lens and whose lower side close to the photoelectric conversion portion is shorter than the upper side.Type: GrantFiled: September 18, 2014Date of Patent: March 1, 2016Assignee: SONY CORPORATIONInventors: Rena Suzuki, Hiroki Tojinbara, Ryoto Yoshita, Yoichi Ueda
-
Publication number: 20150084144Abstract: Disclosed is a solid-state imaging device including a plurality of pixels and a plurality of on-chip lenses. The plurality of pixels are arranged in a matrix pattern. Each of the pixels has a photoelectric conversion portion configured to photoelectrically convert light incident from a rear surface side of a semiconductor substrate. The plurality of on-chip lenses are arranged for every other pixel. The on-chip lenses are larger in size than the pixels. Each of color filters at the pixels where the on-chip lenses are present has a cross-sectional shape whose upper side close to the on-chip lens is the same in width as the on-chip lens and whose lower side close to the photoelectric conversion portion is shorter than the upper side.Type: ApplicationFiled: September 18, 2014Publication date: March 26, 2015Inventors: Rena Suzuki, Hiroki Tojinbara, Ryoto Yoshita, Yoichi Ueda
-
Patent number: RE50032Abstract: Disclosed is a solid-state imaging device including a plurality of pixels and a plurality of on-chip lenses. The plurality of pixels are arranged in a matrix pattern. Each of the pixels has a photoelectric conversion portion configured to photoelectrically convert light incident from a rear surface side of a semiconductor substrate. The plurality of on-chip lenses are arranged for every other pixel. The on-chip lenses are larger in size than the pixels. Each of color filters at the pixels where the on-chip lenses are present has a cross-sectional shape whose upper side close to the on-chip lens is the same in width as the on-chip lens and whose lower side close to the photoelectric conversion portion is shorter than the upper side.Type: GrantFiled: July 28, 2022Date of Patent: July 2, 2024Assignee: Sony Group CorporationInventors: Rena Suzuki, Hiroki Tojinbara, Ryoto Yoshita, Yoichi Ueda