Patents by Inventor Renato Perez Ribas

Renato Perez Ribas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110107288
    Abstract: A method of determining the lowest possible number of serial switches in a pull-up plane or a pull-down plane of a network implementing a logic function. The same method may be used in any multi-value function. Also, the method may be used in generating switch networks to be implemented as standard cells implementations of combinational logic cells. The minimum number of switches can also be used as a criterion for technology mapping devoted to automatic cell generation. The method is based on the use of a covering table to derive a sum of products where individual cubes have a minimum literal count.
    Type: Application
    Filed: December 13, 2010
    Publication date: May 5, 2011
    Inventors: Andre Inacio Reis, Felipe Ribeiro Schneider, Renato Perez Ribas
  • Publication number: 20110107287
    Abstract: A method of determining the lowest possible number of serial switches in a pull-up plane or a pull-down plane of a network implementing a logic function. The same method may be used in any multi-value function. Also, the method may be used in generating switch networks to be implemented as standard cells implementations of combinational logic cells. The minimum number of switches can also be used as a criterion for technology mapping devoted to automatic cell generation. The method is based on the use of a covering table to derive a sum of products where individual cubes have a minimum literal count.
    Type: Application
    Filed: December 13, 2010
    Publication date: May 5, 2011
    Inventors: Andre Inacio Reis, Felipe Ribeiro Schneider, Renato Perez Ribas
  • Patent number: 7877711
    Abstract: A method of determining the lowest possible number of serial switches in a pull-up plane or a pull-down plane of a network implementing a logic function. The same method may be used in any multi-value function. Also, the method may be used in generating switch networks to be implemented as standard cells implementations of combinational logic cells. The minimum number of switches can also be used as a criterion for technology mapping devoted to automatic cell generation. The method is based on the use of a covering table to derive a sum of products where individual cubes have a minimum literal count.
    Type: Grant
    Filed: February 28, 2007
    Date of Patent: January 25, 2011
    Assignee: Nangate A/S
    Inventors: Andre Inacio Reis, Felipe Ribeiro Schneider, Renato Perez Ribas