Abstract: A thin film lateral SOI power device comprises a substrate and a buried oxide layer (4) on the substrate; a silicon layer (6) on the buried oxide layer, the silicon layer having a laterally extending drift region; a dielectric layer on the silicon layer (6), the dielectric layer having a gate dielectric layer (18), a field dielectric layer (20) and a drift dielectric layer (22) having thickness larger than the thickness of the field dielectric layer (24) and a dielectric layer transition region (24) between the field dielectric layer and the drift dielectric layer; a gate (26) located above a channel region (27) in the first silicon layer thickness region (10) and extending as a field plate (28, 36,44) from the channel region (27) across at least the field dielectric layer (20); a drain (30) laterally spaced to the third thickness region (12) of the silicon layer (6); and a source (32) laterally separated from the gate; wherein in a drift region extending in the silicon layer (6) from the channel region (27)

Abstract: A lateral isolated gate bipolar transistor (LIGBT) device comprises a substrate (20) and a buried oxide layer (22) on the substrate; a silicon layer (24) on the buried oxide layer, the silicon layer having a laterally extending drift region (26); an emitter/cathode (28) on top of the silicon layer, a collector/anode (30) on top of the silicon layer and laterally separated from the emitter/cathode (28); a dielectric layer (42), e.g. thermally grown oxide, in between the emitter/cathode (28) and the collector/anode (30); a gate electrode (34) on top of the silicon layer (24); and a field plate (38, 40) extending on top or within the field oxide layer to almost an end thereof adjacent to the collector/anode. The region of the silicon layer (24) between an end (46) of the field plate adjacent to the collector/anode (30) and below the level of the field plate (38, 40) and the collector/anode (30) has a Gummel number sufficient to suppress a parasitic bipolar effect at the collector/anode (30) of the LIGBT.

Abstract: The invention relates to a SOI deep depletion MOS transistor provided in a thin silicon layer (5) adjoining a surface (4) of a silicon body (3) and insulated from a silicon substrate (7) by a buried oxide layer (6). The channel region (13) of a first conductivity type is provided with at least one and preferably a plurality of zones (16) of the opposite conductivity type adjoining the surface to remove minority carriers from the interface between the channel and the gate oxide (15). The zones (16) extend across the whole thickness of the channel and adjoin the buried oxide at the side of the channel remote from the gate dielectric. Due to this construction, minority carriers are removed also from the rear side of the channel. This enables the transistor to be operative also at high voltages having values at which the substrate and the buried oxide operate as a second gate and as a second gate dielectric, respectively.

Abstract: The invention relates to a SOI deep depletion MOS transistor provided in a thin silicon layer (5) adjoining a surface (4) of a silicon body (3) and insulated from a silicon substrate (7) by a buried oxide layer (6). The channel region (13) of a first conductivity type is provided with at least one and preferably a plurality of zones (16) of the opposite conductivity type adjoining the surface to remove minority carriers from the interface between the channel and the gate oxide (15). The zones (16) extend across the whole thickness of the channel and adjoin the buried oxide at the side of the channel remote from the gate dielectric. Due to this construction, minority carriers are removed also from the rear side of the channel. This enables the transistor to be operative also at high voltages having values at which the substrate and the buried oxide operate as a second gate and as a second gate dielectric, respectively.