Patents by Inventor Rene Peyrard

Rene Peyrard has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Processor and method for processing mask data
    Patent number: 11922133
    Abstract: A method includes processing, by an arithmetic and logic unit of a processor, masked data, and keeping, by the arithmetic and logic unit of the processor, the masked data masked throughout their processing by the arithmetic and logic unit. A processor includes an arithmetic and logic unit configured to keep masked data masked throughout processing of the masked data in the arithmetic and logic unit.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: March 5, 2024
    Assignees: STMicroelectronics (Rousset) SAS, STMicroelectronics (Grenoble 2) SAS
    Inventors: Rene Peyrard, Fabrice Romain, Jean-Michel Derien, Christophe Eichwald
  • Circuit and method for binary flag determination
    Patent number: 11762633
    Abstract: The present disclosure relates to a circuit and method for determining a sign indicator bit of a binary datum including a step for processing of the binary datum masked with a masking operation, and not including any processing step of the binary datum.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: September 19, 2023
    Assignees: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Rousset) SAS
    Inventors: Rene Peyrard, Fabrice Romain
  • Device and method for binary flag determination
    Patent number: 11714604
    Abstract: An embodiment method for determining a carry digit indicator bit of a first binary datum includes a step for processing of the first binary datum masked by a masking operation, and not including any processing step of the first binary datum.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: August 1, 2023
    Assignees: STMICROELECTRONICS (ROUSSET) SAS, STMICROELECTRONICS (GPENOBLE 2) SAS
    Inventors: Rene Peyrard, Fabrice Romain
  • DATA TRANSMISSION ON I2C BUS
    Publication number: 20220027303
    Abstract: In an embodiment, a method of transmission over an I2C bus includes: transmitting first data over a first channel of a data signal of the I2C bus; and transmitting second data over a second channel of the data signal, wherein the first data and the second data are linked to each other.
    Type: Application
    Filed: February 13, 2020
    Publication date: January 27, 2022
    Inventor: Rene Peyrard
  • DEVICE AND METHOD FOR EXTRACTION AND INSERTION OF BINARY WORDS
    Publication number: 20210109713
    Abstract: The present disclosure relates to a device and method for processing masked binary data values, comprising extracting and inserting a first part of a first masked binary data value in a second masked binary data value, in which the first and second masked binary data values stay masked throughout all of the processing.
    Type: Application
    Filed: September 30, 2020
    Publication date: April 15, 2021
    Inventors: Rene Peyrard, Fabrice Romain
  • DEVICE AND METHOD FOR BINARY FLAG DETERMINATION
    Publication number: 20210109708
    Abstract: An embodiment method for determining a carry digit indicator bit of a first binary datum includes a step for processing of the first binary datum masked by a masking operation, and not including any processing step of the first binary datum.
    Type: Application
    Filed: September 30, 2020
    Publication date: April 15, 2021
    Inventors: Rene Peyrard, Fabrice Romain
  • PROCESSOR AND METHOD FOR PROCESSING MASK DATA
    Publication number: 20210109711
    Abstract: An embodiment relates to a method for processing masked data using a processor comprising an arithmetic and logic unit, in which the masked data remain masked during their processing in the arithmetic and logic unit.
    Type: Application
    Filed: September 30, 2020
    Publication date: April 15, 2021
    Inventors: Rene Peyrard, Fabrice Romain, Jean-Michel Derien, Christophe Eichwald
  • CIRCUIT AND METHOD FOR BINARY FLAG DETERMINATION
    Publication number: 20210109714
    Abstract: The present disclosure relates to a circuit and method for determining a sign indicator bit of a binary datum including a step for processing of the binary datum masked with a masking operation, and not including any processing step of the binary datum.
    Type: Application
    Filed: September 30, 2020
    Publication date: April 15, 2021
    Inventors: Rene Peyrard, Fabrice Romain
  • Arrangement and method
    Patent number: 9178776
    Abstract: A method includes providing at least one target bandwidth for bandwidth usage on an interconnect, the target bandwidth being for traffic associated with a traffic initiator. The method also includes measuring a served bandwidth and resetting the measuring of served bandwidth in response to an occurrence of an event.
    Type: Grant
    Filed: March 7, 2013
    Date of Patent: November 3, 2015
    Assignees: STMICROELECTRONICS (GRENOBLE 2) SAS, STMICROELECTRONICS S.R.L.
    Inventors: Ignazio Antonino Urzi, Rene Peyrard, Daniele Mangano
  • ARRANGEMENT AND METHOD
    Publication number: 20130268990
    Abstract: A method includes providing at least one target bandwidth for bandwidth usage on an interconnect, the target bandwidth being for traffic associated with a traffic initiator. The method also includes measuring a served bandwidth and resetting the measuring of served bandwidth in response to an occurrence of an event.
    Type: Application
    Filed: March 7, 2013
    Publication date: October 10, 2013
    Applicants: STMicroelectronics S.r.I, STMicroelectronics (Grenoble 2) SAS
    Inventors: Ignazio Antonino Urzi, Rene Peyrard, Daniele Mangano