Patents by Inventor Rene Verlinden

Rene Verlinden has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11791832
    Abstract: A calibration system comprises an actuator circuit comprising a first delay circuit that receives a plurality of data pulses and a second delay circuit that receives the pulses, wherein one of the first and second delay circuits delays the data pulses independently of the other of the first and second delay circuits; a data switch that receives an output of the actuator circuit including delay data signals of the data pulses from the first and second delay circuits and switches and outputs a plurality of local oscillator (LO) signals for output as a controlled LO signal according to control signals of the delay data signals and applied to the data switch. At least one calibration switch receives the output of the actuator circuit and the plurality of LO+ and LO? signals, and outputs a second controlled LO signal output to a sense circuit.
    Type: Grant
    Filed: January 18, 2022
    Date of Patent: October 17, 2023
    Assignee: NXP B.V.
    Inventors: Erik Olieman, Rene Verlinden, Helmut Kranabenter
  • Patent number: 11742834
    Abstract: Various embodiments relate to a free running oscillator, that includes a switch capacitor based frequency-to-voltage converter (F2V), a comparator, and a voltage controlled oscillator (VCO), which may be collectively configured to reduce amplifier offset and flicker noise while increasing effective gain of the amplifier of the comparator. The F2V may produce a feedback voltage Vfb corresponding to frequencies of output of the VCO. The comparator may be configured to sample a reference voltage Vref using a sampling capacitor, compare Vref to Vfb, and generate an output based on any difference between Vref and Vfb, where the output may be integrated using an integrating capacitor of the comparator. The comparator may compensate for parasitic capacitance at the output of the amplifier by using an amplifier having two outputs, with the sampling capacitor and integrating capacitor being coupled to respectively different outputs of the amplifier.
    Type: Grant
    Filed: September 13, 2022
    Date of Patent: August 29, 2023
    Assignee: NXP B.V.
    Inventors: Sander Derksen, Jos Verlinden, Ids Christiaan Keekstra, René Verlinden
  • Publication number: 20230231566
    Abstract: A calibration system comprises an actuator circuit comprising a first delay circuit that receives a plurality of data pulses and a second delay circuit that receives the pulses, wherein one of the first and second delay circuits delays the data pulses independently of the other of the first and second delay circuits; a data switch that receives an output of the actuator circuit including delay data signals of the data pulses from the first and second delay circuits and switches and outputs a plurality of local oscillator (LO) signals for output as a controlled LO signal according to control signals of the delay data signals and applied to the data switch. At least one calibration switch receives the output of the actuator circuit and the plurality of LO+ and LO? signals, and outputs a second controlled LO signal output to a sense circuit.
    Type: Application
    Filed: January 18, 2022
    Publication date: July 20, 2023
    Inventors: Erik Olieman, Rene Verlinden, Helmut Kranabenter
  • Publication number: 20230006655
    Abstract: Various embodiments relate to a free running oscillator, that includes a switch capacitor based frequency-to-voltage converter (F2V), a comparator, and a voltage controlled oscillator (VCO), which may be collectively configured to reduce amplifier offset and flicker noise while increasing effective gain of the amplifier of the comparator. The F2V may produce a feedback voltage Vfb corresponding to frequencies of output of the VCO. The comparator may be configured to sample a reference voltage Vref using a sampling capacitor, compare Vref to Vfb, and generate an output based on any difference between Vref and Vfb, where the output may be integrated using an integrating capacitor of the comparator. The comparator may compensate for parasitic capacitance at the output of the amplifier by using an amplifier having two outputs, with the sampling capacitor and integrating capacitor being coupled to respectively different outputs of the amplifier.
    Type: Application
    Filed: September 13, 2022
    Publication date: January 5, 2023
    Inventors: Sander Derksen, Jos Verlinden, Ids Christiaan Keekstra, René Verlinden
  • Patent number: 11476838
    Abstract: Various embodiments relate to a free running oscillator, including: a voltage controlled oscillator circuit including an input configured to receive an input voltage and an output configured to provide an oscillation signal, wherein the input voltage controls a frequency of the oscillation signal; a frequency to voltage circuit including an input configured to receive the oscillation signal and an output configured to produce a voltage dependent on a frequency of the oscillation signal; a comparison circuit including an input and an output comprising: a first amplifier including a first input, a second input, and an output, wherein the output is based upon a difference in voltage between the first input and the second input, wherein the first input received one of a reference voltage and the output of frequency to voltage circuit; a second amplifier including a first input, a second input, and an output, wherein the output is based upon a difference in voltage between the first input and the second input, fir
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: October 18, 2022
    Assignee: NXP B.V.
    Inventors: Sander Derksen, Jos Verlinden, Ids Christiaan Keekstra, Rene Verlinden
  • Publication number: 20140063348
    Abstract: A current steering Digital-to-Analog Converter (DAC), a video adapter including a current steering DAC, and a video circuit including a current steering DAC are described. In one embodiment, a current steering DAC includes multiple DAC unit cells that are connected in parallel with each other. Each of the DAC unit cells includes three output switches connected to a current source. The three output switches are configured to form two differential pairs of switches that are placed in parallel with each other and share a negative output switch of the three output switches. The current steering DAC also includes at least one switch control circuit configured to receive digital input data and to control the three output switches of each of the DAC unit cells to generate differential analog output data based on the digital input data and a current from the current source. Other embodiments are also described.
    Type: Application
    Filed: September 5, 2012
    Publication date: March 6, 2014
    Applicant: NXP B.V.
    Inventor: René Verlinden
  • Patent number: 8653999
    Abstract: A current steering Digital-to-Analog Converter (DAC), a video adapter including a current steering DAC, and a video circuit including a current steering DAC are described. In one embodiment, a current steering DAC includes multiple DAC unit cells that are connected in parallel with each other. Each of the DAC unit cells includes three output switches connected to a current source. The three output switches are configured to form two differential pairs of switches that are placed in parallel with each other and share a negative output switch of the three output switches. The current steering DAC also includes at least one switch control circuit configured to receive digital input data and to control the three output switches of each of the DAC unit cells to generate differential analog output data based on the digital input data and a current from the current source. Other embodiments are also described.
    Type: Grant
    Filed: September 5, 2012
    Date of Patent: February 18, 2014
    Assignee: NXP B.V.
    Inventor: Rene Verlinden