Patents by Inventor Renee E. Wallerius

Renee E. Wallerius has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and apparatus for calibrating a synchronous read channel integrated circuit
    Patent number: 6313961
    Abstract: A method and apparatus for calibrating the components of a Partial Response Read Channel (PRML) integrated circuit utilized in a magnetic storage device including a channel quality circuit, incorporated within the read channel IC, for automatically measuring the performance of each component as data is read by the channel. An error measurement for each component is generated as an indicator of the component's performance, such as a sample error generated by measuring the difference between the samples read by the channel and expected samples. The read channel components are programmed over a range of settings to determine the settings that generate the minimum error. By programming the components with settings corresponding to minimum error rates, the read channel is optimized.
    Type: Grant
    Filed: January 5, 1996
    Date of Patent: November 6, 2001
    Assignee: Cirrus Logic, Inc.
    Inventors: Alan J. Armstrong, Renee E. Wallerius, Richard T. Behrens, Charles J. Duey