Abstract: A memory controller for controlling a memory device includes a host interface and a background controller. The host interface communicates with a host through a link, determines whether quality of the link has been degraded by monitoring the quality of the link, and performs a link recovery operation on the link when it is determined that the quality of the link is degraded. The background controller controls the memory device to perform a background operation, while the link recovery operation is being performed.

Abstract: A method for managing communication between a Universal Flash Storage (UFS) device and a UFS host includes determining at least one path of payload data flow along at least one of a transmission lane of the UFS host and a transmission lane of the UFS device. Based on the determined at least one path of the payload data flow, the method includes initiating, by operating at least one of the UFS host and the UFS device, at least one Hibernate state entry action. Further, the method includes initiating, by operating the at least one of the UFS host and the UFS device, at least one Hibernate state exit action after completion of transfer of a pre-determined number of data frames of the payload data between the UFS host and the UFS device.

Abstract: The present invention relates to a method of validating a memory device. The method includes validating a second memory device based on one or more first microcode instructions stored in a validated predetermined part of a first memory device to detect the operational status of the second memory device. Further, the method includes receiving one or more second microcode instructions upon validating the second memory device. Finally, validating the first memory device based on the one or more second microcode instructions stored in the second memory device to detect the operational status of the first memory device.

Abstract: A method disclosed herein includes transferring, by a Universal Flash Storage (UFS) device, data to a UFS host without checking for first credit information at the UFS host on initiating a read command by the UFS host. The first credit information includes information about an available size of a host UFS Interconnect (UIC) Reception (Rx) buffer of a host UIC module. The method includes transferring, by the UFS host, data to the UFS device based on second credit information received from the UFS device on initiating a write command by the UFS host. The second credit information includes information about a size of a device UIC Rx buffer of a device UIC module, wherein the size of the device UIC Rx buffer is associated with a maximum size defined by a UFS system.

Abstract: The present invention relates to a method of validating a memory device. The method includes validating a second memory device based on one or more first microcode instructions stored in a validated predetermined part of a first memory device to detect the operational status of the second memory device. Further, the method includes receiving one or more second microcode instructions upon validating the second memory device. Finally, validating the first memory device based on the one or more second microcode instructions stored in the second memory device to detect the operational status of the first memory device.

Abstract: Embodiments herein provide a Non-Volatile Dual In-Line Memory Module (NVDIMM) device assisted operations management method. The method includes on sending, by the host, a read command to the NVDIMM device receiving, by the host, an URGENT signal upon which it issues a SEND Command and receives a message packet form the NVDIMM device, wherein the message packet comprises information about a time required by the NVDIMM device to read the particular data and an information about operations at the NVDIMM device. Further, the method includes performing, by the host, configuration of the host in a power down mode based on the time required by the NVDIMM device to read the particular data and an information about operations at the NVDIMM device, or performing scheduling operations based on time required by the NVDIMM device to read the particular data and the information about operations at the NVDIMM device.

Abstract: A memory controller for controlling a memory device includes a host interface and a background controller. The host interface communicates with a host through a link, determines whether quality of the link has been degraded by monitoring the quality of the link, and performs a link recovery operation on the link when it is determined that the quality of the link is degraded. The background controller controls the memory device to perform a background operation, while the link recovery operation is being performed.

Abstract: A method disclosed herein includes transferring, by a Universal Flash Storage (UFS) device, data to a UFS host without checking for first credit information at the UFS host on initiating a read command by the UFS host. The first credit information includes information about an available size of a host UFS Interconnect (UIC) Reception (Rx) buffer of a host UIC module. The method includes transferring, by the UFS host, data to the UFS device based on second credit information received from the UFS device on initiating a write command by the UFS host. The second credit information includes information about a size of a device UIC Rx buffer of a device UIC module, wherein the size of the device UIC Rx buffer is associated with a maximum size defined by a UFS system.

Abstract: Embodiments herein provide a Non-Volatile Dual In-Line Memory Module (NVDIMM) device assisted operations management method. The method includes on sending, by the host, a read command to the NVDIMM device receiving, by the host, an URGENT signal upon which it issues a SEND Command and receives a message packet form the NVDIMM device, wherein the message packet comprises information about a time required by the NVDIMM device to read the particular data and an information about operations at the NVDIMM device. Further, the method includes performing, by the host, configuration of the host in a power down mode based on the time required by the NVDIMM device to read the particular data and an information about operations at the NVDIMM device, or performing scheduling operations based on time required by the NVDIMM device to read the particular data and the information about operations at the NVDIMM device.

Abstract: A method for managing communication between a Universal Flash Storage (UFS) device and a UFS host includes determining at least one path of payload data flow along at least one of a transmission lane of the UFS host and a transmission lane of the UFS device. Based on the determined at least one path of the payload data flow, the method includes initiating, by operating at least one of the UFS host and the UFS device, at least one Hibernate state entry action. Further, the method includes initiating, by operating the at least one of the UFS host and the UFS device, at least one Hibernate state exit action after completion of transfer of a pre-determined number of data frames of the payload data between the UFS host and the UFS device.