Abstract: The present invention provides a display panel motherboard, a manufacturing method thereof, and a display panel. The manufacturing method of the display panel motherboard includes: forming a first type through-hole in a central region of a substrate motherboard, forming a second type through-hole in an edge region of the substrate motherboard, and comparing a ratio of a contact resistance of the first type through-hole to a contact resistance of the second type through-hole to a default threshold value for designing a display panel motherboard that meets requirements.

Abstract: The disclosure provides a collage display panel, including a first display panel and a second display panel which are spliced to each other. A side of a bonding region of the collage display panel is provided with a first alignment mark which is used as a standard line for detecting printing accuracy of a first metal line, thereby improving production yield, reducing risks, and preventing a problem of low image quality. Furthermore, both sides of the bonding region may be provided with an alignment mark, which can more concisely detect printing accuracy of the first metal line.

Abstract: The invention provides a GOA circuit, each GOA unit of GOA circuit comprising: a pull up control module, an output module, a pull down module, a first pull down maintenance module, and a second pull down maintenance module; wherein the 32nd TFT of first pull down maintenance module and the 33rd TFT of second pull down maintenance module having gate connected to the second node and third node respectively, source connected to the first low voltage signal, and drain connected to the scan signal; the 42nd TFT of first pull down maintenance module, the 43rd TFT of second pull down maintenance module, and the 41st TFT of pull down module having source connected to the second low voltage signal. The first low voltage signal is higher than the second low voltage signal, and the second low voltage signal is higher than low voltage level of the clock signal.

Abstract: The invention provides a GOA circuit, each GOA unit of GOA circuit comprising: a pull up control module, an output module, a pull down module, a first pull down maintenance module, and a second pull down maintenance module; wherein the 32nd TFT of first pull down maintenance module and the 33rd TFT of second pull down maintenance module having gate connected to the second node and third node respectively, source connected to the first low voltage signal, and drain connected to the scan signal; the 42nd TFT of first pull down maintenance module, the 43rd TFT of second pull down maintenance module, and the 41st TFT of pull down module having source connected to the second low voltage signal. The first low voltage signal is higher than the second low voltage signal, and the second low voltage signal is higher than low voltage level of the clock signal.