Abstract: In one form, a video processing device (150) includes a memory (110, 130) and a plurality of staged macroblock processing engines (112, 114, 116). The memory (110, 130) is operable to store partially decoded video data decoded from a stream of encoded video data. The plurality of staged macroblock processing engines (112, 114, 116) is coupled to the memory (110, 130) and is responsive to a request to process the partially decoded video data to generate a plurality of macroblocks of decoded video data. In another form, a first a first macroblock of decoded video data having a first location (426) within a first row (408) of a video frame (400) is generated, and a second macroblock of decoded video data having a second location (424) within a second row (410) of the video frame (400) is generated during the generating of the first macroblock.

Abstract: A video processing device (150) includes a bitstream accelerator module (106) and a video processing engine (108). The bitstream accelerator module (106) has an input for receiving a stream of encoded video data, and an output adapted to be coupled to a memory (112) for storing partially decoded video data. The bitstream accelerator module (106) partially decodes the stream of encoded video data according to a selected one of a plurality of video formats to provide the partially decoded video data. The video processing engine (108) has input adapted to be coupled to the memory (112) for reading the partially decoded video data, and an output for providing decoded video data.

Abstract: A video processing device (150) includes a bitstream accelerator module (106) and a video processing engine (108). The bitstream accelerator module (106) has an input for receiving a stream of encoded video data, and an output adapted to be coupled to a memory (112) for storing partially decoded video data. The bitstream accelerator module (106) partially decodes the stream of encoded video data according to a selected one of a plurality of video formats to provide the partially decoded video data. The video processing engine (108) has input adapted to be coupled to the memory (112) for reading the partially decoded video data, and an output for providing decoded video data.

Abstract: In one form, a video processing device (150) includes a memory (110, 130) and a plurality of staged macroblock processing engines (112, 114, 116). The memory (110, 130) is operable to store partially decoded video data decoded from a stream of encoded video data. The plurality of staged macroblock processing engines (112, 114, 116) is coupled to the memory (110, 130) and is responsive to a request to process the partially decoded video data to generate a plurality of macroblocks of decoded video data. In another form, a first a first macroblock of decoded video data having a first location (426) within a first row (408) of a video frame (400) is generated, and a second macroblock of decoded video data having a second location (424) within a second row (410) of the video frame (400) is generated during the generating of the first macroblock.

Abstract: A system for monitoring and controlling the safety system of equipment, which is used to insure personnel safety and cause the system to “fail safe” in the event of computer or software failure, the failure of a critical piece of hardware, or the opening of any interlock indicating, for example, the unexpected entry of personnel into a dangerous area. Provides an integrated system of timed status monitoring hardware and software for use in a distributed-network computer-controlled environment. The hardware piece of this system includes a digital I/O computer add-on card, or other hardware supporting high-speed alternating state telemetry, and a custom circuit card. Such a circuit, when used within the overall control system can monitor the state of interlock switches and monitor the status of the computer control system(s). Such a safety circuit can then cause a shutdown appropriate to the failure detected.

Abstract: An AC power source is coupled to a step-up transformer that provides a rectified DC output voltage to charge an intermediate capacitor. A high voltage electronic switch is turned ON and OFF by a control signal to couple and decouple the intermediate capacitor to the input of an inductor that supplies current to a capacitor bank. A switching regulator controller generates a control signal to vary the turn ON and OFF times of the electronic switch to generate a controlled current through the inductor while the voltage across the capacitor bank varies over a positive and negative voltage range during charging and discharging of the capacitor bank. The controlled current through the inductor is maintained while the capacitor bank is discharged. The value of the controlled current may be constant or varied in response to input and output voltage and current parameters.

Abstract: A system for monitoring and controlling the safety system of equipment, which is used to insure personnel safety and cause the system to “fail safe” in the event of computer or software failure, the failure of a critical piece of hardware, or the opening of any interlock indicating, for example, the unexpected entry of personnel into a dangerous area. Provides an integrated system of timed status monitoring hardware and software for use in a distributed-network computer-controlled environment. The hardware piece of this system includes a digital I/O computer add-on card, or other hardware supporting high-speed alternating state telemetry, and a custom circuit card. Such a circuit, when used within the overall control system can monitor the state of interlock switches and monitor the status of the computer control system(s). Such a safety circuit can then cause a shutdown appropriate to the failure detected.

Abstract: A power supply with a high voltage current regulated output wherein input devices are gated ON and OFF to regulate the output current. The output current is coupled through a current limiting inductor to a high voltage fast electronic switch (E-switch) that turns ON and OFF much faster than the power supply can shut down. The electronic switch is bypassed with a resistor network that is sized to dissipate slightly in excess of the full power rating of the power supply during a shut-down cycle. The electronic switch is normally gated ON providing a low impedance path for current charging the capacitor bank. When a short circuit condition is sensed, the E-switch is turned OFF and the resistor network limits the short circuit current, limits the voltage across the E-switch, and dissipates any energy stored in the inductor and the power supply circuitry during power supply shut-down.