Patents by Inventor Reo Usui

Reo Usui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200114735
    Abstract: A vehicular laminated glass in which a plurality of glass plates and an intermediate film disposed between the plurality of glass plates are stacked. The vehicular laminated glass includes a first region having a colored layer disposed along an upper edge of the vehicular laminated glass with reference to an orientation of a vehicle to which the vehicular laminated glass is attached, and a second region disposed lower than the first region. The first region includes a region A having a light scattering layer and a region B not having the light scattering layer. In the region A, a visible light transmittance is 0.7% to 32%, a visible light reflectance is 0.5% to 10%, a vehicle-inner side visible light diffuse reflectance is 3% to 45%, and the light scattering layer is arranged at a vehicle-inner side relative to the colored layer.
    Type: Application
    Filed: December 9, 2019
    Publication date: April 16, 2020
    Applicant: AGC Inc.
    Inventors: Yukihiro Tao, Reo Usui
  • Patent number: 10453891
    Abstract: A substrate with conductive film includes a base material; and a film of a conductive metal oxide arranged on an upper part of the base material. The film includes, by a top plan view, a first region and a second region, the second region is configured of a same material as the first region, and an electric resistance of the second region is higher than an electric resistance of the first region. The second region includes a part configured by a plurality of cellular sections surrounded by a plurality of fine cracks. In the part, each fine crack has a width of 1 nm to 50 nm, and each cellular section has a largest measure of less than 10 ?m.
    Type: Grant
    Filed: August 1, 2017
    Date of Patent: October 22, 2019
    Assignee: AGC Inc.
    Inventors: Takeshi Tomizawa, Yuki Aoshima, Reo Usui, Hidefumi Odaka
  • Patent number: 10287676
    Abstract: The present invention relates to a method for forming a TiO2 thin film on a substrate by using an atmospheric pressure CVD method, in which a raw material gas contains titanium tetraisopropoxide (TTIP) and a chloride of a metal M vaporizable in a temperature range of 100 to 400° C. and the amount of the chloride of the metal M is from 0.01 to 0.18 as a concentration ratio to the titanium tetraisopropoxide (TTIP) (chloride of metal M (mol %)/TTIP (mol %)).
    Type: Grant
    Filed: May 18, 2016
    Date of Patent: May 14, 2019
    Assignee: AGC Inc.
    Inventors: Hiroaki Iwaoka, Atsushi Seki, Kousuke Chonan, Reo Usui, Toshio Suzuki, Tomomi Abe
  • Publication number: 20180122838
    Abstract: A carrier substrate to be used, when manufacturing a member for an electronic device on a surface of a substrate, by being bonded to the substrate, includes at least a first glass substrate. The first glass substrate has a compaction described below of 80 ppm or less. Compaction is a shrinkage in a case of subjecting the first glass substrate to a temperature raising from a room temperature at 100° C./hour and to a heat treatment at 600° C. for 80 minutes, and then to a cooling to the room temperature at 100° C./hour.
    Type: Application
    Filed: December 7, 2017
    Publication date: May 3, 2018
    Applicant: Asahi Glass Company, Limited
    Inventors: Kazutaka ONO, Takatoshi YAOITA, Reo USUI, Kenichi EBATA, Jun AKIYAMA
  • Publication number: 20170330913
    Abstract: A substrate with conductive film includes a base material; and a film of a conductive metal oxide arranged on an upper part of the base material. The film includes, by a top plan view, a first region and a second region, the second region is configured of a same material as the first region, and an electric resistance of the second region is higher than an electric resistance of the first region. The second region includes a part configured by a plurality of cellular sections surrounded by a plurality of fine cracks. In the part, each fine crack has a width of 1 nm to 50 nm, and each cellular section has a largest measure of less than 10 ?m.
    Type: Application
    Filed: August 1, 2017
    Publication date: November 16, 2017
    Applicant: Asahi Glass Company, Limited
    Inventors: Takeshi TOMIZAWA, Yuki AOSHIMA, Reo USUI, Hidefumi ODAKA
  • Publication number: 20160258055
    Abstract: The present invention relates to a method for forming a TiO2 thin film on a substrate by using an atmospheric pressure CVD method, in which a raw material gas contains titanium tetraisopropoxide (TTIP) and a chloride of a metal M vaporizable in a temperature range of 100 to 400° C. and the amount of the chloride of the metal M is from 0.01 to 0.18 as a concentration ratio to the titanium tetraisopropoxide (TTIP) (chloride of metal M (mol %)/TTIP (mol %)).
    Type: Application
    Filed: May 18, 2016
    Publication date: September 8, 2016
    Applicant: Asahi Glass Company, Limited
    Inventors: Hiroaki IWAOKA, Atsushi SEKI, Kousuke CHONAN, Reo USUI, Toshio SUZUKI, Tomomi ABE
  • Publication number: 20150068595
    Abstract: A glass substrate for a Cu—In—Ga—Se solar cell. The glass substrate includes the specific amounts of SiO2, Al2O3, B2O3, MgO, CaO, SrO, BaO, ZrO2, Na2O and K2O. In the glass substrate, MgO+CaO+SrO+BaO is from 10 to 30%, Na2O+K2O is from 8 to 20%, Na2O/K2O is from 0.7 to 2.0, and (2×Na2O-2×MgO—CaO)×(Na2O/K2O) is from 3 to 22. The glass substrate has a glass transition temperature of from 640 to 700° C., an average coefficient of thermal expansion of from 60×10?7 to 110×10?7/° C., and a density of from 2.45 to 2.9 g/cm3.
    Type: Application
    Filed: March 5, 2013
    Publication date: March 12, 2015
    Applicant: Asahi Glass Company, Limited
    Inventors: Yutaka Kuroiwa, Shinichi Amma, Reo Usui, Tomomi Abe, Takeshi Tomizawa
  • Publication number: 20130306145
    Abstract: A glass substrate for a CIGS solar cell containing specific amounts of SiO2, Al2O3, B2O3, MgO, CaO, SrO, BaO, ZrO2, TiO2, Na2O and K2O, respectively. The glass substrate satisfies the specific requirements regarding MgO+CaO+SrO+BaO, Na2O+K2O, MgO/Al2O3, (2Na2O+K2O+SrO+BaO)/(Al2O3+ZrO2), Na2O/K2O, the relation of Al2O3 and MgO, and the relation of CaO and MgO, respectively. The glass substrate has a glass transition temperature of 640° C. or higher, an average coefficient of thermal expansion within a range of 50 to 350° C. of 70×10?7 to 90×10?7/° C., the temperature (T4) of 1,230° C. or lower, the temperature (T2) of 1,650° C. or lower, and a density of 2.7 g/cm3 or less. The glass substrate satisfies the relationship of T4?TL??30° C.
    Type: Application
    Filed: July 29, 2013
    Publication date: November 21, 2013
    Applicant: ASAHI GLASS COMPANY, LIMITED
    Inventors: Yu HANAWA, Yutaka Kuroiwa, Tetsuya Nakashima, Reo Usui, Takeshi Tomizawa, Tomomi Sekine
  • Publication number: 20130233386
    Abstract: A glass substrate for a Cu—In—Ga—Se solar cell. The glass substrate contains specific oxides with the specific amounts, respectively. The glass substrate has a glass transition temperature of from 650 to 750° C., an average coefficient of thermal expansion within a range of from 50 to 350° C. of from 75×10?7 to 95×10?7/° C., a relationship between a temperature (T4), at which a viscosity reaches 104 dPa·s, and a devitrification temperature (TL) of T4?TL??30° C., a density of 2.6 g/cm3 or less, and a brittleness index of less than 7,000 m?1/2.
    Type: Application
    Filed: April 22, 2013
    Publication date: September 12, 2013
    Applicant: ASAHI GLASS COMPANY, LIMITED
    Inventors: Yu HANAWA, Yutaka KUROIWA, Tetsuya NAKASHIMA, Reo USUI
  • Patent number: 8418359
    Abstract: A method for manufacturing a circuit pattern-provided substrate including forming a resist layer on a substrate, forming an opening corresponding to a circuit pattern and having an eaves cross-sectional shape in the resist layer, forming a thin film layer having a portion formed on the substrate in the opening and a portion formed on the resist layer, and removing the resist layer such that the resist layer and the portion of the thin film layer formed on the resist layer are removed from the substrate. The forming of the opening comprises exposing the resist layer with a mask device which changes an exposure amount of the resist layer such that the eaves cross-sectional shape has a space at a boundary between the resist layer and the substrate.
    Type: Grant
    Filed: February 2, 2009
    Date of Patent: April 16, 2013
    Assignee: Asahi Glass Company, Limited
    Inventors: Ryohei Satoh, Koji Nakagawa, Eiji Morinaga, Reo Usui, Kenji Tanaka, Satoru Takaki, Kenichi Ebata, Hiroshi Sakamoto
  • Publication number: 20120100774
    Abstract: An object of the invention is to provide a method for manufacturing a transparent substrate provided with a tin oxide thin film which can be satisfactorily patterned even by irradiation with a laser light having low energy because an ablation phenomenon occurs therewith. The invention relates to a method for manufacturing a transparent substrate bearing a circuit pattern, which comprises irradiating a thin-film-attached transparent substrate comprising a transparent substrate having thereon a transparent conductive film having a carrier concentration of 5×1019/cm3 or higher, with a laser light having a wavelength of 1,064 nm to form a circuit pattern on the transparent substrate.
    Type: Application
    Filed: January 3, 2012
    Publication date: April 26, 2012
    Applicant: ASAHI GLASS COMPANY, LIMITED
    Inventors: Ryohei SATOH, Koji Nakagawa, Eiji Morinaga, Reo Usui, Takamitsu Isono, Kenji Tanaka, Satoru Takaki, Kenichi Ebata, Hiroshi Sakamoto
  • Patent number: 7846641
    Abstract: A process for producing a glass substrate having a circuit pattern is disclosed. The process includes forming a thin film layer on a glass substrate and then irradiating the thin film layer with laser light to form a circuit pattern on the glass substrate; depositing a low-melting point glass having a softening point of from 450 to 630° C. on the glass substrate having the circuit pattern formed thereon; and sintering the low-melting point glass to form a low-melting point glass layer which includes the low-melting point glass sintered on the glass substrate having the circuit pattern formed thereon and which forms a compatible layer between the glass substrate and the low-melting point glass layer.
    Type: Grant
    Filed: June 20, 2008
    Date of Patent: December 7, 2010
    Assignee: Asahi Glass Company, Limited
    Inventors: Ryohei Satoh, Koji Nakagawa, Reo Usui, Kenji Tanaka, Satoru Takaki, Kenichi Ebata, Yumiko Aoki
  • Patent number: 7790358
    Abstract: There is provided a method for forming a continuous thin film circuit pattern with good precision, at low cost and with low environmental burden; an electronic circuit fabricated by the same, and an electronic device including the same. There are a step for forming a mask layer 2 on a substrate 1; a step for forming an opening pattern in the mask layer 2; a step for forming a thin film 3 on the substrate 1 and on the mask layer 2; and a step for removing, from the substrate 1, the mask layer 2 and a portion of the thin film 3 formed on the mask layer 2; wherein the opening pattern is formed under a dry condition.
    Type: Grant
    Filed: May 11, 2006
    Date of Patent: September 7, 2010
    Assignee: Asahi Glass Company, Limited
    Inventors: Ryohei Satoh, Yoshinori Iwata, Koji Nakagawa, Reo Usui
  • Publication number: 20090205851
    Abstract: The present invention is to provide a method for manufacturing a circuit pattern-provided transparent substrate having a circuit pattern which is free from pattern peeling and remaining of resist and has good pattern precision and which does not cause disconnection when used as an electrode of an electron circuit or the like.
    Type: Application
    Filed: February 2, 2009
    Publication date: August 20, 2009
    Applicant: ASAHI GLASS COMPANY, LIMITED
    Inventors: Ryohei SATOH, Koji Nakagawa, Eiji Morinaga, Reo Usui, Kenji Tanaka, Satoru Takaki, Kenichi Ebata, Hiroshi Sakamoto
  • Publication number: 20080311359
    Abstract: The invention provides a process for producing a glass substrate (10) having a circuit pattern (26), which includes a circuit pattern formation step of forming a thin film layer (12) on a glass substrate and then irradiating the thin film layer with laser light (22) to form a circuit pattern on the glass substrate; a low-melting point glass deposition step of depositing a low-melting point glass (28) having a softening point of from 450 to 630° C. on the glass substrate having the circuit pattern formed thereon; and a sintering step of sintering the low-melting point glass to form a low-melting point glass layer (32) comprising the low-melting point glass sintered on the glass substrate having the circuit pattern formed thereon and to form a compatible layer (34) between the glass substrate and the low-melting point glass layer.
    Type: Application
    Filed: June 20, 2008
    Publication date: December 18, 2008
    Applicant: ASAHI GLASS COMPANY, LIMITED
    Inventors: Ryohei SATOH, Koji NAKAGAWA, Reo USUI, Kenji TANAKA, Satoru TAKAKI, Kenichi EBATA, Yumiko AOKI
  • Publication number: 20080202798
    Abstract: An object of the invention is to provide a method for manufacturing a transparent substrate provided with a tin oxide thin film which can be satisfactorily patterned even by irradiation with a laser light having low energy because an ablation phenomenon occurs therewith. The invention relates to a method for manufacturing a transparent substrate bearing a circuit pattern, which comprises irradiating a thin-film-attached transparent substrate comprising a transparent substrate having thereon a transparent conductive film having a carrier concentration of 5×1019/cm3 or higher, with a laser light having a wavelength of 1,064 nm to form a circuit pattern on the transparent substrate.
    Type: Application
    Filed: April 28, 2008
    Publication date: August 28, 2008
    Applicant: ASAHI GLASS COMPANY LIMITED
    Inventors: Ryohei SATOH, Koji Nakagawa, Eiji Morinaga, Reo Usui, Takamitsu Isono, Kenji Tanaka, Satoru Takaki, Kenichi Ebata, Hiroshi Sakamoto
  • Publication number: 20060240338
    Abstract: There is provided a method for forming a continuous thin film circuit pattern with good precision, at low cost and with low environmental burden; an electronic circuit fabricated by the same, and an electronic device including the same. There are a step for forming a mask layer 2 on a substrate 1; a step for forming an opening pattern in the mask layer 2; a step for forming a thin film 3 on the substrate 1 and on the mask layer 2; and a step for removing, from the substrate 1, the mask layer 2 and a portion of the thin film 3 formed on the mask layer 2; wherein the opening pattern is formed under a dry condition.
    Type: Application
    Filed: May 11, 2006
    Publication date: October 26, 2006
    Applicant: ASAHI GLASS COMPANY, LIMITED
    Inventors: Ryohei Satoh, Yoshinori Iwata, Koji Nakagawa, Reo Usui