Patents by Inventor Resmi Rajendran

Resmi Rajendran has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8896610
    Abstract: In at least some embodiments, an apparatus includes a hardware accelerator subsystem with a pipeline. The hardware accelerator subsystem is configured to perform error recovery operations in response to a bit stream error. The error recovery operations comprise a pipe-down process to completely decode a data block that is already in the pipeline, an overwrite process to overwrite commands in the hardware accelerator subsystem with null operations (NOPs) once the pipe-down process is complete, and a pipe-up process to restart decoding operations of the pipeline at a next synchronization point.
    Type: Grant
    Filed: February 17, 2012
    Date of Patent: November 25, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: Resmi Rajendran, Pavan Venkata Shastry
  • Publication number: 20130044118
    Abstract: In at least some embodiments, an apparatus includes a hardware accelerator subsystem with a pipeline. The hardware accelerator subsystem is configured to perform error recovery operations in response to a bit stream error. The error recovery operations comprise a pipe-down process to completely decode a data block that is already in the pipeline, an overwrite process to overwrite commands in the hardware accelerator subsystem with null operations (NOPs) once the pipe-down process is complete, and a pipe-up process to restart decoding operations of the pipeline at a next synchronization point.
    Type: Application
    Filed: February 17, 2012
    Publication date: February 21, 2013
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Resmi Rajendran, Pavan Venkata Shastry