Patents by Inventor Reu-Chieh Liu

Reu-Chieh Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for validating an integrated circuit and related semiconductor product thereof
    Patent number: 7464314
    Abstract: A method for converting an integrated circuit into a test circuit for validating functionality of the integrated circuit is disclosed. The integrated circuit is formed on a wafer, and includes a first inner node and a second inner node, wherein the first and second nodes are not floating. The method includes: providing a wire; and utilizing the wire to electrically connect the first inner node to the second inner node, wherein the wire crosses a scribe line of the wafer.
    Type: Grant
    Filed: May 12, 2005
    Date of Patent: December 9, 2008
    Assignee: Realtek Semiconductor Corp.
    Inventor: Reu-Chieh Liu
  • METHOD FOR VALIDATING AN INTEGRATED CIRCUIT AND RELATED SEMICONDUCTOR PRODUCT THEREOF
    Publication number: 20060259836
    Abstract: A method for converting an integrated circuit into a test circuit for validating functionality of the integrated circuit is disclosed. The integrated circuit is formed on a wafer, and includes a first inner node and a second inner node, wherein the first and second nodes are not floating. The method includes: providing a wire; and utilizing the wire to electrically connect the first inner node to the second inner node, wherein the wire crosses a scribe line of the wafer.
    Type: Application
    Filed: May 12, 2005
    Publication date: November 16, 2006
    Inventor: Reu-Chieh Liu