Patents by Inventor Reuel B. Swint
Reuel B. Swint has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230400652Abstract: A III-V/SiNx hybrid integrated photonics platform is described. A wafer can include regions where SiNx waveguides are formed and regions where III-V waveguides have been grown heteroepitaxially from the Si substrate and formed lithographically to butt couple to the SiNx waveguides. Efficient optical coupling is possible between the SiNx and III-V waveguides (?2.5 dB loss/transition). A threading dislocation density (TDD) as low as 4×106 cm?2 can be obtained in the III-V waveguides. The TDD enables fully parallel fabrication of integrated III-V optoelectronic devices, allowing for complex photonic integrated circuits with many active components.Type: ApplicationFiled: May 15, 2023Publication date: December 14, 2023Inventors: Christopher Heidelberger, Cheryl Marie SORACE-AGASKAR, Jason PLANT, Boris KHARAS, Reuel B. SWINT, Yifei Li, Paul William JUODAWLKIS
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Patent number: 11340400Abstract: Photonic integrated circuits (PICs) enable manipulation of light on a chip for telecommunications and information processing. They can be made with silicon and silicon-compatible materials using complementary metal-oxide-semiconductor (CMOS) fabrication techniques developed for making electronics. Unfortunately, most light sources are made with III-V and II-VI materials, which are not compatible with silicon CMOS fabrication techniques. As a result, the light source for a PIC is either off-chip or integrated onto the PIC after CMOS fabrication is over. Hybrid integration can be improved by forming a recess in the PIC to receive a III-V or II-VI photonic chip. Mechanical stops formed in or next to the recess during fabrication align the photonic chip vertically to the PIC. Fiducials on the PIC and the photonic chip enable sub-micron lateral alignment. As a result, the photonic chip can be flip-chip bonded to the PIC with sub-micron vertical and lateral alignment precision.Type: GrantFiled: March 5, 2020Date of Patent: May 24, 2022Assignee: Massachusetts Institute of TechnologyInventors: Boris Kharas, Reuel B. Swint, Cheryl Marie Sorace-Agaskar, Paul William Juodawlkis, Suraj Deepak Bramhavar, Jason Plant
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Publication number: 20200284978Abstract: Photonic integrated circuits (PICs) enable manipulation of light on a chip for telecommunications and information processing. They can be made with silicon and silicon-compatible materials using complementary metal-oxide-semiconductor (CMOS) fabrication techniques developed for making electronics. Unfortunately, most light sources are made with III-V and II-VI materials, which are not compatible with silicon CMOS fabrication techniques. As a result, the light source for a PIC is either off-chip or integrated onto the PIC after CMOS fabrication is over. Hybrid integration can be improved by forming a recess in the PIC to receive a III-V or II-VI photonic chip. Mechanical stops formed in or next to the recess during fabrication align the photonic chip vertically to the PIC. Fiducials on the PIC and the photonic chip enable sub-micron lateral alignment. As a result, the photonic chip can be flip-chip bonded to the PIC with sub-micron vertical and lateral alignment precision.Type: ApplicationFiled: March 5, 2020Publication date: September 10, 2020Inventors: Boris KHARAS, Reuel B. SWINT, Cheryl Marie SORACE-AGASKAR, Paul William JUODAWLKIS, Suraj Deepak BRAMHAVAR, Jason PLANT
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Patent number: 10365670Abstract: Electrical and electromechanical devices often require maintaining a specific temperature, or a narrow range or temperatures, during operation. An assembly regulates the temperature of a device by providing a variable thermal resistance between the device and a heatsink. The device can be mounted to a base having a high thermal resistance, the base thermally isolating the device from the heatsink. At low environmental temperatures, the base enables the device to rise to its operating temperature as a result of the device's waste heat, and with no or minimal use of a heater. As the environmental temperature increases, a working fluid, having a low thermal resistance, undergoes thermal expansion to fill a portion of a volume in the base between the device and the heat sink, lowering the thermal resistance between the device and the heatsink to maintain the device at the required operating temperature.Type: GrantFiled: January 26, 2017Date of Patent: July 30, 2019Assignee: Massachusetts Institute of TechnologyInventors: Reuel B. Swint, Gregory D. Allen, Todd A. Thorsen, Boris G. Kharas, Donna-Ruth Webb Yost
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Publication number: 20180095481Abstract: Electrical and electromechanical devices often require maintaining a specific temperature, or a narrow range or temperatures, during operation. An assembly regulates the temperature of a device by providing a variable thermal resistance between the device and a heatsink. The device can be mounted to a base having a high thermal resistance, the base thermally isolating the device from the heatsink. At low environmental temperatures, the base enables the device to rise to its operating temperature as a result of the device's waste heat, and with no or minimal use of a heater. As the environmental temperature increases, a working fluid, having a low thermal resistance, undergoes thermal expansion to fill a portion of a volume in the base between the device and the heat sink, lowering the thermal resistance between the device and the heatsink to maintain the device at the required operating temperature.Type: ApplicationFiled: January 26, 2017Publication date: April 5, 2018Inventors: Reuel B. Swint, Gregory D. Allen, Todd A. Thorsen, Boris G. Kharas, Donna-Ruth Webb Yost
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Patent number: 9671670Abstract: An electro-optic modulator imparts the information contained in an electrical signal traveling along a transmission line onto an optical carrier by using signal-related variations in the electrical signal's voltage to modulate the refractive index or absorption in an electro-optic material through which the optical carrier propagates. For optimal bandwidth and modulation efficiency, the microwave and optical waves should be matched in velocity. However, conventional microwave transmission lines have a microwave velocity that is somewhat higher than the optical group velocity in typical optical waveguides. Tuning a microwave transmission line's capacitance reduces the microwave velocity, but also reduces the impedance below the 50? impedance of most microwave components. Conversely, tuning the microwave transmission line's inductance makes it possible to match the microwave velocity to the optical group velocity over bandwidths of 100 GHz or greater while maintaining a microwave impedance of 50?.Type: GrantFiled: June 3, 2014Date of Patent: June 6, 2017Assignee: MASSACHUSETTS INSTITUTE OF TECHNOLOGYInventors: Mark A. Hollis, Reuel B. Swint, Dominic Siriani, Joseph P. Donnelly, Paul William Juodawlkis
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Publication number: 20160202592Abstract: An electro-optic modulator imparts the information contained in an electrical signal traveling along a transmission line onto an optical carrier by using signal-related variations in the electrical signal's voltage to modulate the refractive index or absorption in an electro-optic material through which the optical carrier propagates. For optimal bandwidth and modulation efficiency, the microwave and optical waves should be matched in velocity. However, conventional microwave transmission lines have a microwave velocity that is somewhat higher than the optical group velocity in typical optical waveguides. Tuning a microwave transmission line's capacitance reduces the microwave velocity, but also reduces the impedance below the 50? impedance of most microwave components. Conversely, tuning the microwave transmission line's inductance makes it possible to match the microwave velocity to the optical group velocity over bandwidths of 100 GHz or greater while maintaining a microwave impedance of 50?.Type: ApplicationFiled: June 3, 2014Publication date: July 14, 2016Inventors: Mark A. Hollis, Reuel B. Swint, Dominic Siriani, Joseph P. Donnelly, Paul William Juodawlkis
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Publication number: 20110128982Abstract: A slab-coupled optical waveguide laser (SCOWL) is provided that includes an upper and lower waveguide region for guiding a laser mode. The upper waveguide region is positioned in the interior regions of the SCOWL. The lower waveguide region also guides the laser mode. The lower waveguide region is positioned in an area underneath the upper waveguide region. An active region is positioned between the upper waveguide region and the lower waveguide region. The active region is arranged so etching into the SCOWL is permitted to define one or more ridge structures leaving the active region unetched.Type: ApplicationFiled: December 2, 2009Publication date: June 2, 2011Inventors: Robin K. Huang, Joseph P. Donnelly, Reuel B. Swint
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Publication number: 20030219053Abstract: An index guide laser structure of the invention utilizes the combination of two spatial filter elements to limit or eliminate oscillation of high order lateral modes and beam steering. A preferred structure utilizes a frustrated and curved index guide to induce bend loss in higher order modes, and another preferred structure utilizes frustrating guides to introduce periodic interruptions of the refractive index outside the central guide to induce scattering loss in the higher order modes.Type: ApplicationFiled: February 19, 2003Publication date: November 27, 2003Applicant: The Board of Trustees of the University of IllinoisInventors: Reuel B. Swint, James J. Coleman, Mark Zediker
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Patent number: 6649940Abstract: A semiconductor quantum well laser having separate lateral confinement of injected carriers and the optical mode. A ridge waveguide is used to confine the optical mode. A buried heterostructure confines injected carriers. A preferred embodiment laser of the invention is a layered semiconductor structure including optical confinement layers. A buried heterojunction quantum well within the optical confinement layers is dimensioned and arranged to confine injected carriers during laser operation. A ridge waveguide outside the optical confinement layers is dimensioned and arranged with respect to the buried heterojunction to confine an optical mode during laser operation. An index step created by the buried heterojunction is substantially removed from the optical mode.Type: GrantFiled: June 29, 2001Date of Patent: November 18, 2003Assignees: The Board of Trustees of the University of Illinois, Nuvonyx, Inc.Inventors: James J. Coleman, Reuel B. Swint, Mark S. Zediker
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Publication number: 20030006408Abstract: A semiconductor quantum well laser having separate lateral confinement of injected carriers and the optical mode. A ridge waveguide is used to confine the optical mode. A buried heterostructure confines injected carriers. A preferred embodiment laser of the invention is a layered semiconductor structure including optical confinement layers. A buried heterojunction quantum well within the optical confinement layers is dimensioned and arranged to confine injected carriers during laser operation. A ridge waveguide outside the optical confinement layers is dimensioned and arranged with respect to the buried heterojunction to confine an optical mode during laser operation. An index step created by the buried heterojunction is substantially removed from the optical mode.Type: ApplicationFiled: June 29, 2001Publication date: January 9, 2003Inventors: James J. Coleman, Reuel B. Swint, Mark S. Zediker