Abstract: A flattening portal bridge (FPB) is provided to support addressing according to a first addressing scheme and a second, alternative addressing scheme. The FPB comprises a primary side and a secondary side, the primary side connects to a first set of devices addressed according to a first addressing scheme, and the secondary side connects to a second set of devices addressed according to a second addressing scheme. The first addressing scheme uses a unique bus number within a Bus/Device/Function (BDF) address space for each device in the first set of devices, and the second bus addressing scheme uses a unique bus-device number for each device in the second set of devices.

Abstract: Buses such as USB4 or Thunderbolt 4 buses may allow for device combinations that actually cannot be accommodated on the bus. A monitoring component, e.g., software and/or hardware component, such as an Operating System (OS) policy manager, may monitor a bus for events identifying changes to devices on the bus. The monitoring component may influence mode changes to hardware/software, such as to the USB configuration, device driver settings, attached device settings, and/or settings for devices attaching to the bus. Influenced changes facilitate accommodating changes to the devices attached to the bus. For example, if a display is attached and it would exceed available bus bandwidth, cause an excess system load, or cause some other problem, rather than fail to enumerate the display, instead hardware and/or software associated with the bus may be influenced to result in a resolution reduction for the display to accommodate it attaching to the bus.

Abstract: Systems, devices, computer program products, and methods include determining by a connection manager that a connected device can be enhanced by an asymmetrical multi-lane link. The connection manager can use system parameters, including bandwidth information, to switch a direction of one or more lanes of the multi-lane link. The connection manager can use register setting instructions to change register settings on the host side and on the device side to switch the direction of one or more lanes of the multi-lane link.

Abstract: Automatic-switching and deployment of software (SW)- or firmware (FW)-based USB4 connection managers (CMs) and associated methods, apparatus, software and firmware. A handshake is defined between BIOS and an operating system (OS) to discover supported CM capability and dynamically switch from a FW CM to a SW CM and visa verse if there is a mismatch. In addition, a mechanism is defined to deploy the correct FW or SW CM driver based on class code, 2-part or 4-part ID. Support for continued USB4 operation during an OS upgrade or downgrade is provided, while ensuring that the best possible CM solution is used based on the advertised platform and OS capability. USB4 controllers support a pass-through mode under which the host controller FW redirects control packets sent between an SW CM and a USB4 fabric, and a FW CM mode under which control packets are communicated between the host controller FW and the USB4 fabric to configure USB4 peripheral devices and/or USB4 hubs in the USB4 fabric.

Abstract: A flattening portal bridge (FPB) is provided to support addressing according to a first addressing scheme and a second, alternative addressing scheme. The FPB comprises a primary side and a secondary side, the primary side connects to a first set of devices addressed according to a first addressing scheme, and the secondary side connects to a second set of devices addressed according to a second addressing scheme. The first addressing scheme uses a unique bus number within a Bus/Device/Function (BDF) address space for each device in the first set of devices, and the second bus addressing scheme uses a unique bus-device number for each device in the second set of devices.

Abstract: Systems, devices, computer program products, and methods include determining by a connection manager that a connected device can be enhanced by an asymmetrical multi-lane link. The connection manager can use system parameters, including bandwidth information, to switch a direction of one or more lanes of the multi-lane link. The connection manager can use register setting instructions to change register settings on the host side and on the device side to switch the direction of one or more lanes of the multi-lane link.

Abstract: A flattening portal bridge (FPB) is provided to support addressing according to a first addressing scheme and a second, alternative addressing scheme. The FPB comprises a primary side and a secondary side, the primary side connects to a first set of devices addressed according to a first addressing scheme, and the secondary side connects to a second set of devices addressed according to a second addressing scheme. The first addressing scheme uses a unique bus number within a Bus/Device/Function (BDF) address space for each device in the first set of devices, and the second bus addressing scheme uses a unique bus-device number for each device in the second set of devices.

Abstract: Aspects of the embodiments include systems, methods, devices, and computer program products to receive, from the downstream component, an indication of an extended capability; determining, from the indication, one or more configuration parameters for the downstream component; applying the one or more configuration parameters; and performing data signal or control signal transmissions across the PCIe-compliant link with the downstream component based, at least in part, on the applied one or more configuration parameters. The extended capabilities can be indicated by a DVSEC extended capability definition received from a downstream device. The extended capabilities of the downstream component can indicate the number of buses, the port type, the expandability capability, the D3Cold support status, the host router indicator, and/or the safe eject requirements of the downstream component.

Abstract: A flattening portal bridge (FPB) is provided to support addressing according to a first addressing scheme and a second, alternative addressing scheme. The FPB comprises a primary side and a secondary side, the primary side connects to a first set of devices addressed according to a first addressing scheme, and the secondary side connects to a second set of devices addressed according to a second addressing scheme. The first addressing scheme uses a unique bus number within a Bus/Device/Function (BDF) address space for each device in the first set of devices, and the second bus addressing scheme uses a unique bus-device number for each device in the second set of devices.

Abstract: A flattening portal bridge (FPB) is provided to support addressing according to a first addressing scheme and a second, alternative addressing scheme. The FPB comprises a primary side and a secondary side, the primary side connects to a first set of devices addressed according to a first addressing scheme, and the secondary side connects to a second set of devices addressed according to a second addressing scheme. The first addressing scheme uses a unique bus number within a Bus/Device/Function (BDF) address space for each device in the first set of devices, and the second bus addressing scheme uses a unique bus-device number for each device in the second set of devices.

Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to facilitate communication with electronic devices supported by an interface specification and electronic devices unsupported by the interface specification. An example apparatus includes a first firmware interface to facilitate communication between an operating system and a first electronic device, the first electronic device supported in an interface specification. The example apparatus includes a second firmware interface instantiated to facilitate communication with a second electronic device that is not supported in the interface specification, the second firmware interface configured to communicate with the first firmware interface to route communication between the operating system and the second electronic device via the first firmware interface and the second firmware interface.

Abstract: A system can include a host machine connected to a device under test (DUT) by a serial link. The host machine can include a serial interface, such as a Thunderbolt interface, and a memory. The DUT can include a trace data source, a high-speed trace interface (HTI) to receive trace data from the trace data source, a serial interface (such as a Thunderbolt interface), and a PIPE interface connecting the HTI with the serial interface. The HTI is to send the trace data to the serial interface through the PIPE interface. The serial interface is to packetize the trace data into a conforming packet format, and send the trace data as a packet across the serial link to the host machine. The host machine can receive the trace data at the host-side serial interface, store the trace data in memory, and process the trace data for debugging the DUT.

Abstract: Aspects of the embodiments include systems, methods, devices, and computer program products to receive, from the downstream component, an indication of an extended capability; determining, from the indication, one or more configuration parameters for the downstream component; applying the one or more configuration parameters; and performing data signal or control signal transmissions across the PCIe-compliant link with the downstream component based, at least in part, on the applied one or more configuration parameters. The extended capabilities can be indicated by a DVSEC extended capability definition received from a downstream device. The extended capabilities of the downstream component can indicate the number of buses, the port type, the expandability capability, the D3Cold support status, the host router indicator, and/or the safe eject requirements of the downstream component.

Abstract: A system can include a host router comprising connection manager logic, a display port adapter, and a display port adapter register to comprise display port adapter register values. A display port source device comprises a display port transmitter connected to the display port adapter. A display port configuration data (DPCD) register comprises display port configuration register values for the display port, the display port transmitter to write to the DPCD register. The display port adapter is to map DPCD register values to the display port adapter register. The connection manager logic is to receive a notification message requesting bandwidth allocation for the display port transmitter, determine an allocated bandwidth for the display port transmitter, and write the allocated bandwidth into the display port adapter register.

Abstract: Bridge logic is provided to receive a request from a device, where the request references an address of a secondary address space. The secondary address space corresponds to a subset of addresses in a configuration address space of a system, and the secondary address space corresponds to a first view of the configuration address space. The bridge logic uses a mapping table to translate the address into a corresponding address in the configuration address space, where addresses of the configuration address space correspond to a different second view of the configuration address space.

Abstract: A universal serial bus (USB) router can include a display port input device to receive a display port signal. The display port input device can include display port link layer parser circuitry to identify display port control or data information from the received display port signal, USB packet construction circuitry to construct a USB packet comprising the display port control or data information identified by the display port link layer parser circuitry, and a USB switch to transmit the USB packet comprising the display control or data information over a USB link. A display port output device can include display port packetizer circuitry to construct a display port packet from the display port control or data information from the USB packet, and display port output circuitry to output the display port packet across a display port link.

Abstract: Aspects of the embodiments include systems, methods, devices, and computer program products to receive, from the downstream component, an indication of an extended capability; determining, from the indication, one or more configuration parameters for the downstream component; applying the one or more configuration parameters; and performing data signal or control signal transmissions across the PCIe-compliant link with the downstream component based, at least in part, on the applied one or more configuration parameters. The extended capabilities can be indicated by a DVSEC extended capability definition received from a downstream device. The extended capabilities of the downstream component can indicate the number of buses, the port type, the expandability capability, the D3Cold support status, the host router indicator, and/or the safe eject requirements of the downstream component.

Abstract: An example includes an apparatus for transmitting Universal Serial Bus (USB) packets. The apparatus includes a transmitter adapter to receive a USB packet from a USB device. The transmitter adapter can further generate one or more alternate mode packets based on the USB packet. The transmitter adapter can also transmit the alternate mode packets via an alternate mode connection.

Abstract: Automatic-switching and deployment of software (SW)- or firmware (FW)-based USB4 connection managers (CMs) and associated methods, apparatus, software and firmware. A handshake is defined between BIOS and an operating system (OS) to discover supported CM capability and dynamically switch from a FW CM to a SW CM and visa verse if there is a mismatch. In addition, a mechanism is defined to deploy the correct FW or SW CM driver based on class code, 2-part or 4-part ID. Support for continued USB4 operation during an OS upgrade or downgrade is provided, while ensuring that the best possible CM solution is used based on the advertised platform and OS capability. USB4 controllers support a pass-through mode under which the host controller FW redirects control packets sent between an SW CM and a USB4 fabric, and a FW CM mode under which control packets are communicated between the host controller FW and the USB4 fabric to configure USB4 peripheral devices and/or USB4 hubs in the USB4 fabric.

Abstract: Systems, devices, computer program products, and methods include determining by a connection manager that a connected device can be enhanced by an asymmetrical multi-lane link. The connection manager can use system parameters, including bandwidth information, to switch a direction of one or more lanes of the multi-lane link. The connection manager can use register setting instructions to change register settings on the host side and on the device side to switch the direction of one or more lanes of the multi-lane link.