Abstract: A magnetic domain memory system is provided that includes magnetic domain data chips having a major-minor loop organization wherein the system may include data chips having one or more defective minor loops. A programmable read-only memory (PROM) device is provided to permanently record locations of defective minor loops for each chip in the system. Logic circuitry is employed to inhibit transfer of magnetic domains into or out of a defective minor loop responsive to the data stored at each address location of the PROM. In one embodiment, each memory word location of the programmable read only memory denotes the number of minor loops between defective loops. In a different embodiment, each memory bit location of the programmable read only memory contains either a binary 1 or 0, depending upon whether the associated minor loop is operative or inoperative.

Abstract: A packaging assembly for magnetic bubble chips comprising at least one module assembly board having a surface to which is secured in a substantially planar array a plurality of magnetic bubble chips for the storing and processing of information. First and second sets of terminals are located on opposed lateral edges of the module assembly board for the routing therethrough of information to and from the chips. First and second mounting boards are provided, each board having a set of receptacles for the soldering thereto of a corresponding set of the terminals. A first coil surrounds the module assembly board and is wound about an axis parallel to that of the plane of the chips for producing a magnetic field parallel thereto. A second coil surrounds the first coil and is wound about an axis perpendicular to that of the first coil and parallel to that of the plane of the chips for producing a magnetic field parallel thereto.

Abstract: A non-volatile digital memory is utilized to generate digital pulses for controlling memory operations of a magnetic domain memory system. Each word stored in the memory contains data corresponding to the desired control signals. The digital memory synchronizes the control pulses with the in-plane rotating magnetic field. During each rotation of the magnetic field, a binary counter sequentially addresses the words stored in the digital memory such that the outputs from the digital memory correspond to the desired control signals.

Abstract: A magnetic bubble processor comprising components for causing the movement of magnetic bubbles and a single chip having a layer of magnetic material in which magnetic bubbles can be moved. The chip comprises an input circuit for conveying electrical data and instructions into the processor and a generator responsive to the input data and instructions for producing magnetic bubbles representing bits of information. Paths are provided on the chip for routing magnetic bubbles within the processor as well as a memory organization accessible for the storage and retrieval of magnetic bubble information. The chip also includes magnetic bubble logic for performing mathematical operations and for providing magnetic bubble output information representing the results thereof.

Abstract: A programmable bubble material arrangement employing a plurality of logic components for performing eight different possible logic and arithmetic operations on two applied serial digital data streams. Separately applied control signals in the form of bubbles are applied to the arrangement to selectively program the arrangement, as desired. The logic components include transient bubble switches, resident bubble switches, bubble generators, bubble annihilators, exclusive merge elements, disjoint crossover elements and delay elements. The operations selectively performed are: A + B, A .sym. B, AB, A plus B with carry, A + B, A .sym. B, AB, and A plus B with carry. The arrangement operates equally with data streams either loosely packed (data bubbles periodically placed in the stream) or tightly packed.