Patents by Inventor Rex Frost

Rex Frost has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060046183
    Abstract: A composition including a photoresist formulation and a surfactant additive is described herein.
    Type: Application
    Filed: August 26, 2004
    Publication date: March 2, 2006
    Inventors: Wang Yueh, Shane Nolen, Balijeet Bains, Alison Noble, Rex Frost
  • Publication number: 20050255411
    Abstract: The embodiments of the present invention include decomposing a pattern into dependent patterns. The dependent patterns may then be transferred to a semiconductor wafer surface and the pattern's features may be shrunk. The shrunk features may be transferred to the substrate. The multiple exposures and shrinks facilitate smaller feature dimensions.
    Type: Application
    Filed: May 14, 2004
    Publication date: November 17, 2005
    Inventors: Rex Frost, Swaminathan Sivakumar
  • Publication number: 20050147928
    Abstract: The present invention relates to the reduction of critical dimensions and the reduction of feature sizes in manufacturing integrated circuits. Specifically, the method controls photoresist flow rates to develop critical dimensions beyond the resolution limits of the photoresist material used, and the limits of lithographic tool sets. The resist material characteristics are modified by exposing the resist pattern to either electrons, photons, or ions. The exposure modifies the glass transition temperature, cross linking characteristics, decomposition temperature, or molecular weight of the resist material. The post-exposure resist is then easier to control during a subsequent reflow process to reduce the hole size or line size of the patterned resist.
    Type: Application
    Filed: December 30, 2003
    Publication date: July 7, 2005
    Inventors: Rex Frost, Swaminathan Sivakumar
  • Publication number: 20050148169
    Abstract: The present invention relates to the reduction of critical dimensions and the reduction of feature sizes in manufacturing integrated circuits. Specifically, the method controls photoresist flow rates to develop critical dimensions beyond the resolution limits of the photoresist material used, and the limits of lithographic tool sets. The post exposure and developed resist pattern is exposed to a solvent prior to a bake or reflow process. Exposure to the solvent lowers the molecular weight of the resist material, modifying the resist material's reflow rate. The post-exposure resist is then easier to control during a subsequent reflow process to reduce the hole or line size of the patterned resist.
    Type: Application
    Filed: December 30, 2003
    Publication date: July 7, 2005
    Inventors: Rex Frost, Swaminathan Sivakumar
  • Publication number: 20050097502
    Abstract: Systems and techniques for accommodating diffraction in the printing of features on a substrate. In one implementation, a method includes identifying a pair of features to be printed using a corresponding pair of patterning elements and increasing a separation distance between the pair of patterning elements while maintaining the sufficiently small pitch between the corresponding imaged features. The pitch of the pair of features can be sufficiently small that, upon printing, diffraction will make a separation between the features smaller than a separation between the corresponding pair of patterning elements.
    Type: Application
    Filed: October 31, 2003
    Publication date: May 5, 2005
    Inventors: Rex Frost, Swaminathan Sivakumar
  • Publication number: 20050081178
    Abstract: A mask pattern may be decomposed into two or more masks, each having a pitch greater than that of the original mask pattern. New, “partial-pattern” masks may be created for each of the new mask patterns. The original mask pattern is transferred to the photoresist for the corresponding layer using a multiple exposure technique in which the photoresist is exposed with each of the partial-pattern masks individually, e.g., back-to-back in a pass through a scanner, to define all of the features in the original pattern.
    Type: Application
    Filed: October 8, 2003
    Publication date: April 14, 2005
    Inventors: Swaminathan Sivakumar, Rex Frost, Phi Nguyen