Abstract: A three wire 3D core memory which utilizes the same balanced pairs of sense-inhibit conductors to conduct both high energy common mode inhibit currents and low energy differential mode core switching signals includes pairs of antiparallel Schottky diodes interconnecting the conductor pairs at symmetrical positions therealong intermediate the cores of each memory mat. As high energy common mode inhibit currents are generated small deviations from perfect symmetry of electrical characteristics along the sense-inhibit conductors results in the appearance of differential voltages which are substantial in comparison to switching signal voltages. The sense-inhibit recovery time required for dissipation of these spurious differential voltage signals before a memory read cycle can proceed consumes a substantial portion of a memory cycle for large stacks.