Abstract: Systems and methods are provided for determining localization information for sources of seismic energy positioned below a ground surface. In accord with one series of embodiments, a method of determining localization information receives data from first seismic sensors in a first three dimensional array containing sensors emplaced below the ground surface and coherently processes the signals to provide three dimensional localization information that enables determination of an angle of arrival for a signal of interest. In combination with data from second seismic sensors in a second three dimensional array the method provides determination of a position in three dimensional space.

Abstract: Radiation hardened integrated circuit devices may be fabricated using conventional designs and process, but including specialized structures to reduce or eliminate detrimental effects caused by various forms of radiation. An exemplary BGR structure includes a high-dose buried guard ring (HBGR) layer which is contacted to ground through the backside of the wafer or circuit die, thus forming a Backside BGR (BBGR) structure. In certain embodiments, the starting wafer may be highly doped to reduce the resistance from the HBGR to the back of the wafer, which is then further contacted to ground through the package. The performance of such devices may be further improved by using an electrically conductive adhesive to attach the die and to electrically connect the silicon substrate region to the package's conductive header, substrate, or die attach pad, which in turn is typically connected to one or more package pins/balls.

Abstract: A method of determining electrical parameters of inductive elements includes a novel technique of inverting an impedance matrix representative of said inductive circuit element. The method reduces model simulation time by a factor of 3000. In one embodiment, simulation time of a device model was reduced from 1 hour to less than 3 seconds. The method is suitable for use with circuit element modeling tools, circuit simulation environments, and antenna modeling systems. The method may be applied to inductors, transformers, antennas, etc.

Abstract: The present invention relates to integrated circuits having symmetric inducting devices with a ground shield. In one embodiment, a symmetric inducting device for an integrated circuit comprises a substrate, a main metal layer and a shield. The substrate has a working surface. The main metal layer has at least one pair of current path regions. Each of the current path region pairs is formed in generally a regular polygonal shape that is generally symmetric about a plane of symmetry that is perpendicular to the working surface of the substrate. The shield is patterned into segments that are generally symmetric about the plane of symmetry. Medial portions of at least some segments of the shield are formed generally perpendicular to the plane of symmetry as the medial portions cross the plane of symmetry.

Abstract: The present invention relates to integrated circuits having symmetric inducting devices with a ground shield. In one embodiment, a symmetric inducting device for an integrated circuit comprises a substrate, a main metal layer and a shield. The substrate has a working surface. The main metal layer has at least one pair of current path regions. Each of the current path region pairs is formed in generally a regular polygonal shape that is generally symmetric about a plane of symmetry that is perpendicular to the working surface of the substrate. The shield is patterned into segments that are generally symmetric about the plane of symmetry. Medial portions of at least some segments of the shield are formed generally perpendicular to the plane of symmetry as the medial portions cross the plane of symmetry.

Abstract: The present invention relates to integrated circuits having symmetric inducting devices with a ground shield. In one embodiment, a symmetric inducting device for an integrated circuit comprises a substrate, a main metal layer and a shield. The substrate has a working surface. The main metal layer has at least one pair of current path regions. Each of the current path region pairs is formed in generally a regular polygonal shape that is generally symmetric about a plane of symmetry that is perpendicular to the working surface of the substrate. The shield is patterned into segments that are generally symmetric about the plane of symmetry. Medial portions of at least some segments of the shield are formed generally perpendicular to the plane of symmetry as the medial portions cross the plane of symmetry.

Abstract: A method of a modeling metallization parasitics with the use of a simulation program. In one embodiment, a method of simulating interconnect lines in an electronic design automation simulation is disclosed. The method comprises partitioning the interconnect lines into groups of interconnect lines. Each group of interconnect lines does not have interactions with any of the other groups of interconnect lines. Moreover, at least one of the groups of interconnect lines contains at least three interconnect lines. The interconnect lines in each group are modeled. The modeling includes at least one of modeling mutual inductances and modeling of mutual capacitances.

Abstract: A method of determining electrical parameters of inductive elements includes a novel technique of inverting an impedance matrix representative of said inductive circuit element. The method reduces model simulation time by a factor of 3000. In one embodiment, simulation time of a device model was reduced from 1 hour to less than 3 seconds. The method is suitable for use with circuit element modeling tools, circuit simulation environments, and antenna modeling systems. The method may be applied to inductors, transformers, antennas, etc.

Abstract: An integrated circuit having an inducting device with a symmetric inductor. The inducting device comprises a first and second inductor. The first inductor is formed in a first conductive layer and is approximately symmetric about a plane of symmetry. The second inductor is formed in a second conductive layer that is at a select vertical distance from the first conductive layer. The second inductor is further approximately laterally aligned with the first inductor.

Abstract: A method of determining electrical parameters of inductive elements includes a novel technique of inverting an impedance matrix representative of said inductive circuit element. The method reduces model simulation time by a factor of 3000. In one embodiment, simulation time of a device model was reduced from 1 hour to less than 3 seconds. The method is suitable for use with circuit element modeling tools, circuit simulation environments, and antenna modeling systems. The method may be applied to inductors, transformers, antennas, etc.

Abstract: An integrated circuit having an inducting device with a symmetric inductor. The inducting device comprises a first and second inductor. The first inductor is formed in a first conductive layer and is approximately symmetric about a plane of symmetry. The second inductor is formed in a second conductive layer that is at a select vertical distance from the first conductive layer. The second inductor is further approximately laterally aligned with the first inductor.

Abstract: An electrostatic discharge locating system may include a plurality of receivers and a central unit. Each receiver may include an antenna. The receivers may receive radio wave signals emanating from an electrostatic discharge event and transmit the signals to the central unit for processing. The central unit may determine the location of an electrostatic discharge event from the relative time of signal reception or the signal amplitudes along with predetermined locations of the receivers.

Abstract: A fingerprint sensor includes a plurality of semiconductor devices adjacent a substrate and defining active circuit portions, and having only three metal layers. More particularly, the sensor may include a first metal layer interconnecting predetermined ones of the plurality of semiconductor devices; a second metal layer defining a ground plane; and a third metal layer comprising an array of electric field sensing electrodes connected to active circuit portions for generating an output related to a sensed fingerprint. The fingerprint sensor may also include a package surrounding the substrate and having an opening aligned with the sensing electrodes. In addition, a first external electrode may be carried by the package for contact by a finger. The sensor may thus also include an excitation drive circuit connected between the ground plane and the first external electrode for generating electric fields between the electric field sensing electrodes and adjacent finger portions.