Abstract: A pixel structure comprises a substrate, a first metal layer, a dielectric layer, a semiconductor layer, a second metal layer, a patterned floating metal layer and a pixel electrode. The first metal layer, disposed on the substrate, comprises a gate and a scan line electrically thereto. The dielectric layer, overlapped by the semiconductor layer, is disposed on the substrate and overlapping the first metal layer. The second metal layer comprises a source/drain, disposed on the semiconductor layer and partially overlaps the gate, and a data line, electrically connects to the source and partially overlapped with the scan line. The pixel electrode electrically connects to the drain. Additionally, the patterned floating metal layer is disposed between the dielectric layer and the semiconductor layer, beneath the source/drain and partically overlapping the gate.

Abstract: A pixel structure comprises a substrate, a first metal layer, a dielectric layer, a semiconductor layer, a second metal layer, a patterned floating metal layer and a pixel electrode. The first metal layer, disposed on the substrate, comprises a gate and a scan line electrically thereto. The dielectric layer, overlapped by the semiconductor layer, is disposed on the substrate and overlapping the first metal layer. The second metal layer comprises a source/drain, disposed on the semiconductor layer and partially overlaps the gate, and a data line, electrically connects to the source and partially overlapped with the scan line. The pixel electrode electrically connects to the drain. Additionally, the patterned floating metal layer is disposed between the dielectric layer and the semiconductor layer, beneath the source/drain and partically overlapping the gate.