Patents by Inventor Reza Argenty Pagaila

Reza Argenty Pagaila has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7911070
    Abstract: An integrated circuit package system includes: mounting an integrated circuit, having a planar interconnect, over a carrier with the planar interconnect at a non-active side of the integrated circuit and an active side of the integrated circuit facing the carrier; connecting the integrated circuit and the carrier; connecting the planar interconnect and the carrier; and forming an encapsulation over the integrated circuit, the carrier, and the planar interconnect.
    Type: Grant
    Filed: September 25, 2008
    Date of Patent: March 22, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Reza Argenty Pagaila, Byung Tai Do, Heap Hoe Kuan
  • Publication number: 20100320601
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a structure having a via filled with conductive material completely through the structure, a recess, and a pedestal portion bordering the recess; mounting a semiconductor device inside the recess in the structure; and encapsulating the structure and the semiconductor device in an encapsulation.
    Type: Application
    Filed: June 17, 2009
    Publication date: December 23, 2010
    Inventors: Reza Argenty Pagaila, Byung Tai Do, Linda Pei Ee Chua
  • Publication number: 20100320582
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a base circuit assembly having an integrated circuit device; mounting a pre-formed conductive frame having an outer interconnect and an inner interconnect shorter than the outer interconnect over the base circuit assembly, the inner interconnect over the integrated circuit device and the outer interconnect around the integrated circuit device; applying an encapsulant over the inner interconnect and the outer interconnect; and removing a portion of the pre-formed conductive frame exposing an end of the inner interconnect and an end of the outer interconnect.
    Type: Application
    Filed: June 19, 2009
    Publication date: December 23, 2010
    Inventors: Reza Argenty Pagaila, Byung Tai Do, Jong-Woo Ha
  • Patent number: 7847382
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming an encapsulation surrounding an integrated circuit having an inactive side and an active side exposed; forming a hole through the encapsulation with the hole not exposing the integrated circuit; forming a through conductor in the hole; and mounting a substrate with the integrated circuit surrounded by the encapsulation with the active side facing the substrate.
    Type: Grant
    Filed: March 26, 2009
    Date of Patent: December 7, 2010
    Assignee: Stats Chippac Ltd.
    Inventors: Reza Argenty Pagaila, Byung Tai Do
  • Publication number: 20100244219
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming an encapsulation surrounding an integrated circuit having an inactive side and an active side exposed; forming a hole through the encapsulation with the hole not exposing the integrated circuit; forming a through conductor in the hole; and mounting a substrate with the integrated circuit surrounded by the encapsulation with the active side facing the substrate.
    Type: Application
    Filed: March 26, 2009
    Publication date: September 30, 2010
    Inventors: Reza Argenty Pagaila, Byung Tai Do
  • Publication number: 20100244024
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing an interposer having device contacts, interconnect contacts, and test pads including the interconnect contacts along an interconnect perimeter region of the interposer, the device contacts at a device perimeter region of the interposer with the device perimeter region within the interior of the interconnect perimeter region, and the test pads at a test perimeter region of the interposer with the test perimeter region encompassing the device perimeter region; and mounting an integrated circuit over the device contacts.
    Type: Application
    Filed: March 25, 2009
    Publication date: September 30, 2010
    Inventors: Byung Tai Do, Linda Pei Ee Chua, Sharon Ooi, Reza Argenty Pagaila
  • Publication number: 20100244232
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a carrier; mounting an integrated circuit on the carrier; mounting a z-interconnect on the carrier, the z-interconnect for supporting a trace cantilevered over the integrated circuit; encapsulating the integrated circuit with an encapsulation; removing the carrier; and depositing a substrate below the integrated circuit.
    Type: Application
    Filed: March 26, 2009
    Publication date: September 30, 2010
    Inventors: Reza Argenty Pagaila, Byung Tai Do, Linda Pei Ee Chua
  • Publication number: 20100225007
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming a flip chip die, having a backside protrusion; mounting a wire bond die on the flip chip die, adjacent to the backside protrusion; and mounting an internal stacking module over the backside protrusion and the wire bond die.
    Type: Application
    Filed: March 5, 2009
    Publication date: September 9, 2010
    Inventors: Reza Argenty Pagaila, Byung Tai Do, Linda Pei Ee Chua
  • Patent number: 7750455
    Abstract: An integrated circuit package system includes: providing a first package having a first interposer mounted over a first integrated circuit and the first integrated circuit encapsulated by a first encapsulation; and connecting a second package over the first interposer and on the first encapsulation, the second package including a second integrated circuit having a wire-in-film adhesive thereover, a second interposer mounted on the wire-in-film adhesive and encapsulated by a second encapsulation encapsulating the second integrated circuit, the second interposer including an interconnection pad for connecting a third package to the top thereof.
    Type: Grant
    Filed: August 8, 2008
    Date of Patent: July 6, 2010
    Assignee: Stats Chippac Ltd.
    Inventors: Reza Argenty Pagaila, Byung Tai Do
  • Publication number: 20100140813
    Abstract: A method of manufacture of an integrated circuit packaging system includes providing an integrated circuit having an active side and a non-active side; forming a channel through the integrated circuit; forming an indent, having a flange and an indent side, from a peripheral region of the non-active side; and forming a conformal interconnect, having an offset segment, a sloped segment, and a flange segment, under the indent.
    Type: Application
    Filed: December 9, 2008
    Publication date: June 10, 2010
    Inventors: Reza Argenty Pagaila, Byung Tai Do, Linda Pei Ee Chua
  • Publication number: 20100142174
    Abstract: A method of manufacture of an integrated circuit packaging system includes providing an integrated circuit having an active side and a non-active side; forming an indent, having a flange and an indent side, from a peripheral region of the active side; and forming a conformal interconnect, having an elevated segment, a slope segment, and a flange segment, over the indent.
    Type: Application
    Filed: December 9, 2008
    Publication date: June 10, 2010
    Inventors: Reza Argenty Pagaila, Byung Tai Do, Linda Pei Ee Chua
  • Publication number: 20100140770
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a substrate; mounting a first internal integrated circuit structure and a second internal integrated circuit structure over the substrate; connecting the first internal integrated circuit structure and the second internal integrated circuit structure to the substrate with internal interconnects; forming asymmetric encapsulation structures above the first internal integrated circuit structure and the second internal integrated circuit structure; and encapsulating the first internal integrated circuit structure and the internal interconnects with an encapsulation.
    Type: Application
    Filed: December 4, 2008
    Publication date: June 10, 2010
    Inventors: Reza Argenty Pagaila, Byung Tai Do, Linda Pei Ee Chua
  • Publication number: 20100133534
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing an interposer having a first side and a second side with the first side having a device contact and an interconnect contact and with the second side having a test pad; mounting an integrated circuit over the device contact; and applying an underfill between the integrated circuit and the interposer.
    Type: Application
    Filed: December 3, 2008
    Publication date: June 3, 2010
    Inventors: Byung Tai Do, Reza Argenty Pagaila, Linda Pei Ee Chua
  • Publication number: 20100072596
    Abstract: An integrated circuit package system includes: mounting an integrated circuit, having a planar interconnect, over a carrier with the planar interconnect at a non-active side of the integrated circuit and an active side of the integrated circuit facing the carrier; connecting the integrated circuit and the carrier; connecting the planar interconnect and the carrier; and forming an encapsulation over the integrated circuit, the carrier, and the planar interconnect.
    Type: Application
    Filed: September 25, 2008
    Publication date: March 25, 2010
    Inventors: Reza Argenty Pagaila, Byung Tai Do, Heap Hoe Kuan
  • Publication number: 20100072634
    Abstract: An integrated circuit package system includes: providing a substrate; mounting a first package above the substrate, the first package having a mold cavity exposing an exposed portion on a first integrated circuit from a first package encapsulation; mounting a second package above the first package and attached to the exposed portion of the first integrated circuit; mounting a structure above the second package and connected to the substrate around the first package; and encapsulating the first package and the second package with an outer encapsulation having a completely planar top or a planar top co-planar to a top surface of the structure.
    Type: Application
    Filed: September 23, 2008
    Publication date: March 25, 2010
    Inventors: Jong-Woo Ha, Reza Argenty Pagaila
  • Publication number: 20100072630
    Abstract: An integrated circuit package system includes attaching an adhesive segment spacer to an interposer assembly; mounting an integrated circuit over a carrier; mounting the interposer assembly over the integrated circuit with the adhesive segment spacer exposing an inner region of the integrated circuit and covering a periphery of the integrated circuit; and forming an encapsulation over the integrated circuit, the interposer assembly, and the adhesive segment spacer with the interposer assembly exposed with a recess in the encapsulation.
    Type: Application
    Filed: September 24, 2008
    Publication date: March 25, 2010
    Inventors: Linda Pei Ee Chua, Byung Tai Do, Reza Argenty Pagaila
  • Publication number: 20100033941
    Abstract: An integrated circuit package system includes: providing a substrate; mounting an integrated circuit above the substrate; connecting an interposer to the integrated circuit with a wire-in-film adhesive; connecting an exposed interconnect having an upper surface to the substrate; and encapsulating the integrated circuit with an encapsulation.
    Type: Application
    Filed: August 8, 2008
    Publication date: February 11, 2010
    Inventors: Reza Argenty Pagaila, Byung Tai Do, Linda Pei Ee Chua
  • Publication number: 20100032821
    Abstract: An integrated circuit package system includes: providing a first package having a first interposer mounted over a first integrated circuit and the first integrated circuit encapsulated by a first encapsulation; and connecting a second package over the first interposer and on the first encapsulation, the second package including a second integrated circuit having a wire-in-film adhesive thereover, a second interposer mounted on the wire-in-film adhesive and encapsulated by a second encapsulation encapsulating the second integrated circuit, the second interposer including an interconnection pad for connecting a third package to the top thereof.
    Type: Application
    Filed: August 8, 2008
    Publication date: February 11, 2010
    Inventors: Reza Argenty Pagaila, Byung Tai Do
  • Publication number: 20100025833
    Abstract: An integrated circuit package system includes: providing an internal device; encapsulating the internal device with an encapsulation having an outer surface; and forming a redistribution line having connection points on the outer surface of the encapsulation.
    Type: Application
    Filed: July 30, 2008
    Publication date: February 4, 2010
    Inventors: Reza Argenty Pagaila, Byung Tai Do, Dioscoro A. Merilo
  • Publication number: 20100029046
    Abstract: An integrated circuit package system includes: connecting a concave terminal and an integrated circuit; and forming an encapsulation, having a bottom side, over the integrated circuit and the concave terminal with the concave terminal within the encapsulation.
    Type: Application
    Filed: August 4, 2008
    Publication date: February 4, 2010
    Inventors: Zigmund Ramirez Camacho, Arnel Senosa Trasporto, Reza Argenty Pagaila, Lionel Chien Hui Tay