Abstract: Methods and apparatus for inhibiting branch prediction unit operations of a computer are provided. Program code is generated having instructions which inhibit branch prediction prior to a stable path being executed, the stable path being stable (e.g. with all instructions executed sequentially as they occur in memory) with high likelihood. The instructions when executed trigger such branch prediction unit inhibition. The instructions can be generated so as to have a high prevalence, length, or both, of stable paths.

Abstract: Apparatus, systems, and methods for branch pre-resolution by software-provided hardware-managed backslice execution may be provided. According to an aspect, a method may be provided. The method may include receiving a plurality of instructions. The method may further include identifying a load-dependent branch (LDB) from the plurality of instructions. The method may further include generating a sequence of instructions associated with the LDB, the sequence of instructions being sufficient to either produce or predict a branch outcome of the LDB. The method may further include identifying a program counter (PC) of the LDB.

Abstract: A method that includes playing back audio content through a speaker of the headset at a volume setting; receiving a microphone signal that includes noise of an acoustic environment captured by a microphone of the headset; detecting a change to an environmental noise level of the noise based on the microphone signal; retrieving, from memory of the headset, an adapted volume setting to the changed environmental noise level, wherein the adapted volume setting is generated at least in part based on user context or user behavior; and adjusting playback of the audio content by transitioning the volume setting to the adapted volume setting.

Abstract: Systems and methods for machine learning-based power capping and virtual machine placement in cloud platforms are disclosed. A method includes applying a machine learning model to predict whether a request for deployment of a virtual machine corresponds to deployment of a user-facing (UF) virtual machine or a non-user-facing (NUF) virtual machine. The method further includes sorting a list of candidate servers based on both a chassis score and a server score for each server to determine a ranked list of the candidate servers, where the server score depends at least on whether the request for the deployment of the virtual machine is determined to be a request for a deployment of a UF virtual machine or a request for a deployment of an NUF virtual machine. The method further includes deploying the virtual machine to a server with highest rank among the ranked list of the candidate servers.

Abstract: This document discloses methods of training a classifier to identify traffic signal states in images captured be a vehicle. The vehicle can then use the identified states when making movement decisions when traveling in an environment. The system determines that a traffic signal is within a field of view of the camera (i.e., within an image). The system also receives a signal with signal phase and timing data for the traffic signal. The system processes the images to identify an image that includes the traffic signal. The system analyzes the signal data to determine a state of the traffic signal at the time of image capture, labels the image with a label of determined state, and passes the image and a label to a classifier in order to train the classifier.

Abstract: There is provided a system and method of prefetching array segments. A prefetcher management unit (PMU) is disclosed. The PMU includes an interface to interact with programs via an application programming interface (API) and one or more data structures configured to store a plurality of addresses, each of the plurality of addresses representing a memory location of data stored in an array segment. The PMU also includes a prefetcher interface configured to use an address in the one or more data structures to instruct a prefetcher to prefetch data into a cache and a load-store unit interface configured to use the address in the one or more data structures to instruct a load-store unit to load data from the cache.

Abstract: There is provided methods and devices for dynamically simplifying processor instructions. A method includes receiving, at a computing device, processor instructions and determining, by the computing device, if instruction simplification is enabled for an instruction being processed. The method further includes determining, by the computing device, from an instruction simplification table if the instruction is capable of being simplified and scheduling, by the computing device, a simplified instruction based on the determination from the instruction simplification table. A device includes a processor, and a non-transient computer readable memory having stored thereon instructions which when executed by the processor configure the device to execute the methods disclosed herein.

Abstract: A method of branch prediction includes, in a pre-execute loop, loading a series of instructions leading to a load dependent branch (LDB) instruction including a load instruction, executing the load instruction to receive a part of a branch condition, computing a branch outcome of the LDB instruction based on the branch condition, and storing the branch outcome to a branch-outcome memory. Then, in a main loop corresponding to the pre-execute loop, loading the LDB instruction, reading the branch outcome from the branch-outcome memory, and executing the main loop based on the branch outcome. In some cases, the method, in the main loop, computes the branch outcome of the branch condition again.

Abstract: A method and hardware system to remove the overhead caused by having stream handling instructions in nested loops. Where code contains inner loops, nested in outer loops, a compiler pass identifies qualified nested streams and generates ISA specific instructions for transferring stream information linking an inner loop stream with an outer loop stream, to hardware components of a co-designed prefetcher. The hardware components include a frontend able to decode and execute instructions for a stream linking information transfer mechanism, a stream engine unit with a streams configuration table (SCT) having a field for allowing a subordinate stream to stay pending for values from its master stream, and a stream prefetch manager with buffers for storing values of current elements of a master stream, and with a nested streams control unit for reconfiguring and iterating the streams.

Abstract: A method and device for providing a vector stream instruction set architecture extension for a CPU. In one aspect, there is provided a vector stream engine unit comprising: a first fast memory storage for temporarily storing data of vector data streams from a memory for loading into a vector register file; a second fast memory storage for temporarily storing data of the vector data streams from the vector register file for loading into the memory; a prefetcher configured to prefetch data of the vector data streams from the memory into the first fast storage memory, and prefetch data of the vector data streams from the vector register file into the second fast storage memory; and a stream configuration table (SCT) storing stream information for prefetching data from the vector data streams.

Abstract: There is provided methods and devices for dynamically simplifying processor instructions. A method includes receiving, at a computing device, processor instructions and determining, by the computing device, if instruction simplification is enabled for an instruction being processed. The method further includes determining, by the computing device, from an instruction simplification table if the instruction is capable of being simplified and scheduling, by the computing device, a simplified instruction based on the determination from the instruction simplification table. A device includes a processor, and a non-transient computer readable memory having stored thereon instructions which when executed by the processor configure the device to execute the methods disclosed herein.

Abstract: A method includes analyzing a dataflow graph representing data dependencies between operators of a dataflow application to identify a plurality of candidate groups of the operators. Based on characteristics of a given hardware accelerator and the operators of a given candidate group of the plurality of candidate groups, determining whether the operators of the given candidate group are to be combined. In response to determining that the operators of the given candidate group are to be combined, retrieving executable binary code segments corresponding to the operators of the given candidate group, generating a unit of binary code including the executable binary code segments and metadata representing an execution control flow among the executable binary code segments, and dispatching the unit of code to the given hardware accelerator for execution of the unit of code.

Abstract: Techniques for identifying change points in health data are described herein. Health data during a first time sub-window is compared to health data from a second time sub-window. The health data is evaluated with respect to a set of change point criteria to determine that a first change is a first change point in the health data. A notification including information about the change point and information about a second change point is generated.

Abstract: A method and hardware system to remove the overhead caused by having stream handling instructions in nested loops. Where code contains inner loops, nested in outer loops, a compiler pass identifies qualified nested streams and generates ISA specific instructions for transferring stream information linking an inner loop stream with an outer loop stream, to hardware components of a co-designed prefetcher. The hardware components include a frontend able to decode and execute instructions for a stream linking information transfer mechanism, a stream engine unit with a streams configuration table (SCT) having a field for allowing a subordinate stream to stay pending for values from its master stream, and a stream prefetch manager with buffers for storing values of current elements of a master stream, and with a nested streams control unit for reconfiguring and iterating the streams.

Abstract: An example method includes, at an electronic device with one or more processors and memory: detecting a new type of available information, the new type of available information being associated with a card for display in a content feed; in accordance with detecting the new type of available information, increasing a relevance score of the card above a display threshold; in accordance with increasing the relevance score above the display threshold: causing the card to be displayed in the content feed; and obtaining data representing user interaction with the displayed card; adjusting, based on the data representing user interaction with the displayed card, the relevance score; and modifying a display of the card in the content feed based on the adjusted relevance score.

Abstract: Systems and methods for machine learning-based power capping and virtual machine placement in cloud platforms are disclosed. A method includes applying a machine learning model to predict whether a request for deployment of a virtual machine corresponds to deployment of a user-facing (UF) virtual machine or a non-user-facing (NUF) virtual machine. The method further includes sorting a list of candidate servers based on both a chassis score and a server score for each server to determine a ranked list of the candidate servers, where the server score depends at least on whether the request for the deployment of the virtual machine is determined to be a request for a deployment of a UF virtual machine or a request for a deployment of an NUF virtual machine. The method further includes deploying the virtual machine to a server with highest rank among the ranked list of the candidate servers.

Abstract: This document discloses methods of training a classifier to identify traffic signal states in images captured be a vehicle. The vehicle can then use the identified states when making movement decisions when traveling in an environment. The system determines that a traffic signal is within a field of view of the camera (i.e., within an image). The system also receives a signal with signal phase and timing data for the traffic signal. The system processes the images to identify an image that includes the traffic signal. The system analyzes the signal data to determine a state of the traffic signal at the time of image capture, labels the image with a label of determined state, and passes the image and a label to a classifier in order to train the classifier.

Abstract: Systems and methods for machine learning-based power capping and virtual machine placement in cloud platforms are disclosed. A method includes applying a machine learning model to predict whether a request for deployment of a virtual machine corresponds to deployment of a user-facing (UF) virtual machine or a non-user-facing (NUF) virtual machine. The method further includes sorting a list of candidate servers based on both a chassis score and a server score for each server to determine a ranked list of the candidate servers, where the server score depends at least on whether the request for the deployment of the virtual machine is determined to be a request for a deployment of a UF virtual machine or a request for a deployment of an NUF virtual machine. The method further includes deploying the virtual machine to a server with highest rank among the ranked list of the candidate servers.

Abstract: A method includes analyzing a dataflow graph representing data dependencies between operators of a dataflow application to identify a plurality of candidate groups of the operators. Based on characteristics of a given hardware accelerator and the operators of a given candidate group of the plurality of candidate groups, determining whether the operators of the given candidate group are to be combined. In response to determining that the operators of the given candidate group are to be combined, retrieving executable binary code segments corresponding to the operators of the given candidate group, generating a unit of binary code including the executable binary code segments and metadata representing an execution control flow among the executable binary code segments, and dispatching the unit of code to the given hardware accelerator for execution of the unit of code.

Abstract: A method includes analyzing a dataflow graph representing data dependencies between operators of a dataflow application to identify a plurality of candidate groups of the operators. Based on characteristics of a given hardware accelerator and the operators of a given candidate group of the plurality of candidate groups, determining whether the operators of the given candidate group are to be combined. In response to determining that the operators of the given candidate group are to be combined, retrieving executable binary code segments corresponding to the operators of the given candidate group, generating a unit of binary code including the executable binary code segments and metadata representing an execution control flow among the executable binary code segments, and dispatching the unit of code to the given hardware accelerator for execution of the unit of code.