Patents by Inventor Reza HOSHYAR
Reza HOSHYAR has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20230368808Abstract: Example operations may include determining a first noise estimate of noise that propagates along a receive path of a device. The operations may further include determining a second noise estimate of the noise and determining a cross-relationship estimate with respect to the noise. In addition, the operations may include adjusting one or more correction filters configured to correct for imbalances between a first branch and a second branch of the receive path. The adjusting may be based on the first noise estimate, the second noise estimate, and the cross-relationship estimate.Type: ApplicationFiled: May 19, 2023Publication date: November 16, 2023Applicant: MAXLINEAR, INC.Inventors: Reza HOSHYAR, Hossein DEHGHAN, Abhishek Kumar AGRAWAL, Kapil GULATI, Eugenio RIVERA RAMOS, Shivashankar BEESANAHALLI, Georgy GILYAROVSKIY
-
Publication number: 20230318638Abstract: Methods and systems may include performing pre-equalization of a signal for transmission, where the pre-equalization includes amplifying a non-linear portion of the signal based on a frequency response of a transmit filter for the non-linear portion of the signal. In such a method or system, the non-linear portion may be configured to counteract spectral spread caused by a power amplifier, and the amplifying of the pre-equalization may cause the non-linear portion of the signal to survive filtering by the transmit filter such that the non-linear portion of the signal arrives at the power amplifier to counteract the spectral spread of the signal for transmission caused by the power amplifier.Type: ApplicationFiled: March 31, 2022Publication date: October 5, 2023Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Abhishek Kumar AGRAWAL, Reza HOSHYAR, Kapil GULATI
-
Patent number: 11688410Abstract: Example operations may include determining a first noise estimate of noise that propagates along a receive path of a device. The operations may further include determining a second noise estimate of the noise and determining a cross-relationship estimate with respect to the noise. In addition, the operations may include adjusting one or more correction filters configured to correct for imbalances between a first branch and a second branch of the receive path. The adjusting may be based on the first noise estimate, the second noise estimate, and the cross-relationship estimate.Type: GrantFiled: May 11, 2021Date of Patent: June 27, 2023Assignee: MaxLinear, Inc.Inventors: Reza Hoshyar, Hossein Dehghan, Abhishek Kumar Agrawal, Kapil Gulati, Eugenio Rivera Ramos, Shivashankar Beesanahalli, Georgy Gilyarovskiy
-
Publication number: 20220173783Abstract: An example method may include configuring a pattern of a sounding packet of a first wireless node in a resource space. Configuring the pattern may include assigning first precoders to a first subset of the resource space for a first antenna sector of the first wireless node; and assigning second precoders to a second subset of the resource space for a second antenna sector of the first wireless node. The method may include wirelessly transmitting the sounding packet with the configured pattern to a second wireless node. The method may include transmitting data packets from the first wireless node to the second wireless node according to one or more transmission parameters that are at least one of received from the second wireless node or determined based on channel state information (CSI) feedback received from the second wireless node.Type: ApplicationFiled: February 18, 2022Publication date: June 2, 2022Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Debashis DASH, Hossein DEHGHAN-FARD, Reza HOSHYAR
-
Publication number: 20220084536Abstract: Example operations may include determining a first noise estimate of noise that propagates along a receive path of a device. The operations may further include determining a second noise estimate of the noise and determining a cross-relationship estimate with respect to the noise. In addition, the operations may include adjusting one or more correction filters configured to correct for imbalances between a first branch and a second branch of the receive path. The adjusting may be based on the first noise estimate, the second noise estimate, and the cross-relationship estimate.Type: ApplicationFiled: May 11, 2021Publication date: March 17, 2022Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Reza HOSHYAR, Hossein DEHGHAN, Abhishek Kumar AGRAWAL, Kapil GULATI, Eugenio RIVERA RAMOS, Shivashankar BEESANAHALLI, Georgy GILYAROVSKIY
-
Patent number: 11258500Abstract: An example method may include configuring a pattern of a sounding packet of a first wireless node in a resource space. Configuring the pattern may include assigning first precoders to a first subset of the resource space for a first antenna sector of the first wireless node; and assigning second precoders to a second subset of the resource space for a second antenna sector of the first wireless node. The method may include wirelessly transmitting the sounding packet with the configured pattern to a second wireless node. The method may include transmitting data packets from the first wireless node to the second wireless node according to one or more transmission parameters that are at least one of received from the second wireless node or determined based on channel state information (CSI) feedback received from the second wireless node.Type: GrantFiled: October 31, 2019Date of Patent: February 22, 2022Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Debashis Dash, Hossein Dehghan-Fard, Reza Hoshyar
-
Patent number: 11101922Abstract: A wireless communications device comprises a transmitter configured to distribute a data stream as a plurality of sub-streams, allocate power to each sub-stream of the plurality of sub-streams, and convert the sub-streams into one or more transmit signals. The wireless communications device also comprises a processor which is configured to obtain channel-quality indicators corresponding to the sub-streams and adjust one or more power allocations of one or more sub-streams to reduce a collective error rate of the data stream based on the channel-quality indicators, subject to a total power limit.Type: GrantFiled: May 26, 2020Date of Patent: August 24, 2021Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Sigurd Schelstraete, Reza Hoshyar
-
Publication number: 20210044300Abstract: A high linearity phase interpolator (PI) is disclosed. A phase value parameter indicative of a desired phase difference between an output signal and an input clock signal edge may be provided by control logic. A first capacitor may be charged for a first period of time with a first current that is proportional to the phase value parameter to produce a first voltage on the capacitor that is proportional to the phase value parameter. The first capacitor may be further charged for a second period of time with a second current that has a constant value to form a voltage ramp offset by the first voltage. A reference voltage may be compared to the voltage ramp during the second period of time. The output signal may be asserted at a time when the voltage ramp equals the reference voltage.Type: ApplicationFiled: October 27, 2020Publication date: February 11, 2021Inventors: Baher Haroun, Wenting Zhou, Kai Yiu Tam, Reza Hoshyar, Ali Kiaei
-
Patent number: 10855294Abstract: A high linearity phase interpolator (PI) is disclosed. A phase value parameter indicative of a desired phase difference between an output signal and an input clock signal edge may be provided by control logic. A first capacitor may be charged for a first period of time with a first current that is proportional to the phase value parameter to produce a first voltage on the capacitor that is proportional to the phase value parameter. The first capacitor may be further charged for a second period of time with a second current that has a constant value to form a voltage ramp offset by the first voltage. A reference voltage may be compared to the voltage ramp during the second period of time. The output signal may be asserted at a time when the voltage ramp equals the reference voltage.Type: GrantFiled: November 8, 2016Date of Patent: December 1, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Baher Haroun, Wenting Zhou, Kai Yiu Tam, Reza Hoshyar, Ali Kiaei
-
Publication number: 20200145072Abstract: An example method may include configuring a pattern of a sounding packet of a first wireless node in a resource space. Configuring the pattern may include assigning first precoders to a first subset of the resource space for a first antenna sector of the first wireless node; and assigning second precoders to a second subset of the resource space for a second antenna sector of the first wireless node. The method may include wirelessly transmitting the sounding packet with the configured pattern to a second wireless node. The method may include transmitting data packets from the first wireless node to the second wireless node according to one or more transmission parameters that are at least one of received from the second wireless node or determined based on channel state information (CSI) feedback received from the second wireless node.Type: ApplicationFiled: October 31, 2019Publication date: May 7, 2020Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Debashis DASH, Hossein DEHGHAN-FARD, Reza HOSHYAR
-
Patent number: 10153777Abstract: Disclosed examples include fractional frequency divider circuits, including a counter to provide phase shifted pulse output signals in response to counting of an adjustable integer number NK cycles of an input clock signal, an output circuit to provide an output clock signal having a first edge between first edges of the pulse output signals, as well as a delta-sigma modulator (DSM), clocked by the second pulse output signal to receive a first predetermined value and to provide a DSM output value, and a phase accumulator to receive a step input value representing a sum of the DSM output value and a second predetermined value. The phase accumulator provides a divisor input signal to the counter, and provides a phase adjustment value to the output circuit to control the position of the first edge of the output clock signal between the first edges of the pulse output signals.Type: GrantFiled: September 30, 2016Date of Patent: December 11, 2018Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Reza Hoshyar, Wenting Zhou, Ali Kiaei, Baher Haroun, Ahmad Bahai
-
Patent number: 10050814Abstract: A Continuous Time Linear Equalizer (CTLE) and a method of operating a CTLE in a receiver for a Pulse Amplitude Modulation (PAM) signal are disclosed. The method includes initiating equalization using an initial equalization setting that is optimized to meet a first objective and responsive to a determination, shifting to a final equalization setting that is optimized to meet a second objective.Type: GrantFiled: January 26, 2017Date of Patent: August 14, 2018Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Reza Hoshyar, Kevin Zheng, Nirmal Warke, Wenting Zhou, Ali Kiaei, Ahmad Bahai
-
Publication number: 20180131378Abstract: A high linearity phase interpolator (PI) is disclosed. A phase value parameter indicative of a desired phase difference between an output signal and an input clock signal edge may be provided by control logic. A first capacitor may be charged for a first period of time with a first current that is proportional to the phase value parameter to produce a first voltage on the capacitor that is proportional to the phase value parameter. The first capacitor may be further charged for a second period of time with a second current that has a constant value to form a voltage ramp offset by the first voltage. A reference voltage may be compared to the voltage ramp during the second period of time. The output signal may be asserted at a time when the voltage ramp equals the reference voltage.Type: ApplicationFiled: November 8, 2016Publication date: May 10, 2018Inventors: Baher Haroun, Wenting Zhou, Kai Yiu Tam, Reza Hoshyar, Ali Kiaei
-
Publication number: 20180097523Abstract: Disclosed examples include fractional frequency divider circuits, including a counter to provide phase shifted pulse output signals in response to counting of an adjustable integer number NK cycles of an input clock signal, an output circuit to provide an output clock signal having a first edge between first edges of the pulse output signals, as well as a delta-sigma modulator (DSM), clocked by the second pulse output signal to receive a first predetermined value and to provide a DSM output value, and a phase accumulator to receive a step input value representing a sum of the DSM output value and a second predetermined value. The phase accumulator provides a divisor input signal to the counter, and provides a phase adjustment value to the output circuit to control the position of the first edge of the output clock signal between the first edges of the pulse output signals.Type: ApplicationFiled: September 30, 2016Publication date: April 5, 2018Applicant: Texas Instruments IncorporatedInventors: Reza Hoshyar, Wenting Zhou, Ali Kiaei, Baher Haroun, Ahmad Bahai
-
Publication number: 20170134190Abstract: A Continuous Time Linear Equalizer (CTLE) and a method of operating a CTLE in a receiver for a Pulse Amplitude Modulation (PAM) signal are disclosed. The method includes initiating equalization using an initial equalization setting that is optimized to meet a first objective and responsive to a determination, shifting to a final equalization setting that is optimized to meet a second objective.Type: ApplicationFiled: January 26, 2017Publication date: May 11, 2017Inventors: Reza Hoshyar, Kevin Zheng, Nirmal Warke, Wenting Zhou, Ali Kiaei, Ahmad Bahai
-
Patent number: 9614659Abstract: A Continuous Time Linear Equalizer (CTLE) and a method of operating a CTLE in a receiver for a Pulse Amplitude Modulation (PAM) signal are disclosed. The method includes initiating equalization using an initial equalization setting that is optimized to meet a first objective and responsive to a determination, shifting to a final equalization setting that is optimized to meet a second objective.Type: GrantFiled: April 14, 2015Date of Patent: April 4, 2017Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Reza Hoshyar, Kevin Zheng, Nirmal Warke, Wenting Zhou, Ali Kiaei, Ahmad Bahai
-
Patent number: 9479366Abstract: A method for adapting a mixed signal Infinite Impulse Response (IIR) Decision Feedback Equalizer (DFE) using pivot taps and monitor taps is disclosed. The method includes, for a given IIR path for a received signal, updating gain of the given IIR path using a respective pivot tap error-data correlation with a first Least Mean Square (LMS) update equation; and updating a time constant of the given IIR path using a respective monitor tap error-data correlation with a second LMS update equation.Type: GrantFiled: April 14, 2015Date of Patent: October 25, 2016Assignee: Texas Instruments IncorporatedInventors: Kevin Zheng, Reza Hoshyar, Nirmal Warke, Ali Kiaei, Ahmad Bahai
-
Publication number: 20160294537Abstract: A device and method for providing clock data recovery (CDR) in a receiver is disclosed. The method comprises receiving a Phase Amplitude Modulation (PAM) signal; on startup, using a non-return-to-zero (NRZ)-based phase frequency detector (PFD) to acquire signal frequency from the received PAM signal; and responsive to a determination, switching to a PAM phase detector (PD) for steady state operation.Type: ApplicationFiled: June 17, 2016Publication date: October 6, 2016Inventors: Reza Hoshyar, Kevin Zheng, Nirmal Warke, Ali Kiaei, Ahmad Bahai
-
Publication number: 20160218889Abstract: A method for adapting a mixed signal Infinite Impulse Response (IIR) Decision Feedback Equalizer (DFE) using pivot taps and monitor taps is disclosed. The method includes, for a given IIR path for a received signal, updating gain of the given IIR path using a respective pivot tap error-data correlation with a first Least Mean Square (LMS) update equation; and updating a time constant of the given IIR path using a respective monitor tap error-data correlation with a second LMS update equation.Type: ApplicationFiled: April 14, 2015Publication date: July 28, 2016Inventors: Kevin Zheng, Reza Hoshyar, Nirmal Warke, Ali Kiaei, Ahmad Bahai
-
Publication number: 20160218859Abstract: A device and method for providing clock data recovery (CDR) in a receiver is disclosed. The method comprises receiving a Phase Amplitude Modulation (PAM) signal; on startup, using a non-return-to-zero (NRZ)-based phase frequency detector (PFD) to acquire signal frequency from the received PAM signal; and responsive to a determination, switching to a PAM phase detector (PD) for steady state operation.Type: ApplicationFiled: April 14, 2015Publication date: July 28, 2016Inventors: Reza Hoshyar, Kevin Zheng, Nirmal Warke, Ali Kiaei, Ahmad Bahai